mirror of
https://github.com/zephyrproject-rtos/zephyr
synced 2025-09-04 20:52:25 +00:00
Usually, we want to operate only on "available" device nodes ("available" means "status is okay and a matching binding is found"), but that's not true in all cases. Sometimes we want to operate on special nodes without matching bindings, such as those describing memory. To handle the distinction, change various additional devicetree APIs making it clear that they operate only on available device nodes, adjusting gen_defines and devicetree.h implementation details accordingly: - emit macros for all existing nodes in gen_defines.py, regardless of status or matching binding - rename DT_NUM_INST to DT_NUM_INST_STATUS_OKAY - rename DT_NODE_HAS_COMPAT to DT_NODE_HAS_COMPAT_STATUS_OKAY - rename DT_INST_FOREACH to DT_INST_FOREACH_STATUS_OKAY - rename DT_ANY_INST_ON_BUS to DT_ANY_INST_ON_BUS_STATUS_OKAY - rewrite DT_HAS_NODE_STATUS_OKAY in terms of a new DT_NODE_HAS_STATUS - resurrect DT_HAS_NODE in the form of DT_NODE_EXISTS - remove DT_COMPAT_ON_BUS as a public API - use the new default_prop_types edtlib parameter Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
171 lines
4.4 KiB
C
171 lines
4.4 KiB
C
/*
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* Copyright (c) 2018 STMicroelectronics
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT st_mpxxdtyy
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#include "mpxxdtyy.h"
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#define LOG_LEVEL CONFIG_AUDIO_DMIC_LOG_LEVEL
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#include <logging/log.h>
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LOG_MODULE_REGISTER(mpxxdtyy);
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#define CHANNEL_MASK 0x55
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static u8_t ch_demux[128] = {
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0x00, 0x01, 0x00, 0x01, 0x02, 0x03, 0x02, 0x03,
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0x00, 0x01, 0x00, 0x01, 0x02, 0x03, 0x02, 0x03,
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0x04, 0x05, 0x04, 0x05, 0x06, 0x07, 0x06, 0x07,
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0x04, 0x05, 0x04, 0x05, 0x06, 0x07, 0x06, 0x07,
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0x00, 0x01, 0x00, 0x01, 0x02, 0x03, 0x02, 0x03,
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0x00, 0x01, 0x00, 0x01, 0x02, 0x03, 0x02, 0x03,
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0x04, 0x05, 0x04, 0x05, 0x06, 0x07, 0x06, 0x07,
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0x04, 0x05, 0x04, 0x05, 0x06, 0x07, 0x06, 0x07,
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0x08, 0x09, 0x08, 0x09, 0x0a, 0x0b, 0x0a, 0x0b,
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0x08, 0x09, 0x08, 0x09, 0x0a, 0x0b, 0x0a, 0x0b,
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0x0c, 0x0d, 0x0c, 0x0d, 0x0e, 0x0f, 0x0e, 0x0f,
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0x0c, 0x0d, 0x0c, 0x0d, 0x0e, 0x0f, 0x0e, 0x0f,
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0x08, 0x09, 0x08, 0x09, 0x0a, 0x0b, 0x0a, 0x0b,
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0x08, 0x09, 0x08, 0x09, 0x0a, 0x0b, 0x0a, 0x0b,
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0x0c, 0x0d, 0x0c, 0x0d, 0x0e, 0x0f, 0x0e, 0x0f,
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0x0c, 0x0d, 0x0c, 0x0d, 0x0e, 0x0f, 0x0e, 0x0f
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};
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static u8_t left_channel(u8_t a, u8_t b)
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{
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return ch_demux[a & CHANNEL_MASK] | (ch_demux[b & CHANNEL_MASK] << 4);
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}
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static u8_t right_channel(u8_t a, u8_t b)
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{
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a >>= 1;
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b >>= 1;
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return ch_demux[a & CHANNEL_MASK] | (ch_demux[b & CHANNEL_MASK] << 4);
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}
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u16_t sw_filter_lib_init(struct device *dev, struct dmic_cfg *cfg)
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{
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struct mpxxdtyy_data *const data = DEV_DATA(dev);
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TPDMFilter_InitStruct *pdm_filter = &data->pdm_filter[0];
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u16_t factor;
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u32_t audio_freq = cfg->streams->pcm_rate;
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int i;
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/* calculate oversampling factor based on pdm clock */
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for (factor = 64U; factor <= 128U; factor += 64U) {
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u32_t pdm_bit_clk = (audio_freq * factor *
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cfg->channel.req_num_chan);
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if (pdm_bit_clk >= cfg->io.min_pdm_clk_freq &&
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pdm_bit_clk <= cfg->io.max_pdm_clk_freq) {
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break;
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}
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}
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if (factor != 64U && factor != 128U) {
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return 0;
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}
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for (i = 0; i < cfg->channel.req_num_chan; i++) {
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/* init the filter lib */
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pdm_filter[i].LP_HZ = audio_freq / 2U;
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pdm_filter[i].HP_HZ = 10;
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pdm_filter[i].Fs = audio_freq;
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pdm_filter[i].Out_MicChannels = cfg->channel.req_num_chan;
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pdm_filter[i].In_MicChannels = cfg->channel.req_num_chan;
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pdm_filter[i].Decimation = factor;
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pdm_filter[i].MaxVolume = 64;
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Open_PDM_Filter_Init(&data->pdm_filter[i]);
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}
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return factor;
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}
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int sw_filter_lib_run(TPDMFilter_InitStruct *pdm_filter,
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void *pdm_block, void *pcm_block,
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size_t pdm_size, size_t pcm_size)
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{
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int i;
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u8_t a, b;
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if (pdm_block == NULL || pcm_block == NULL || pdm_filter == NULL) {
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return -EINVAL;
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}
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for (i = 0; i < pdm_size/2; i++) {
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switch (pdm_filter[0].In_MicChannels) {
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case 1: /* MONO */
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((u16_t *)pdm_block)[i] = HTONS(((u16_t *)pdm_block)[i]);
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break;
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case 2: /* STEREO */
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if (pdm_filter[0].In_MicChannels > 1) {
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a = ((u8_t *)pdm_block)[2*i];
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b = ((u8_t *)pdm_block)[2*i + 1];
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((u8_t *)pdm_block)[2*i] = left_channel(a, b);
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((u8_t *)pdm_block)[2*i + 1] = right_channel(a, b);
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}
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break;
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default:
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return -EINVAL;
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}
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}
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switch (pdm_filter[0].Decimation) {
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case 64:
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for (i = 0; i < pdm_filter[0].In_MicChannels; i++) {
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Open_PDM_Filter_64(&((u8_t *) pdm_block)[i],
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&((u16_t *) pcm_block)[i],
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pdm_filter->MaxVolume,
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&pdm_filter[i]);
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}
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break;
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case 128:
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for (i = 0; i < pdm_filter[0].In_MicChannels; i++) {
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Open_PDM_Filter_128(&((u8_t *) pdm_block)[i],
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&((u16_t *) pcm_block)[i],
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pdm_filter->MaxVolume,
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&pdm_filter[i]);
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}
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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static const struct _dmic_ops mpxxdtyy_driver_api = {
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#if DT_ANY_INST_ON_BUS_STATUS_OKAY(i2s)
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.configure = mpxxdtyy_i2s_configure,
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.trigger = mpxxdtyy_i2s_trigger,
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.read = mpxxdtyy_i2s_read,
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#endif /* DT_ANY_INST_ON_BUS_STATUS_OKAY(i2s) */
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};
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static int mpxxdtyy_initialize(struct device *dev)
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{
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struct mpxxdtyy_data *const data = DEV_DATA(dev);
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data->comm_master = device_get_binding(DT_INST_BUS_LABEL(0));
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if (data->comm_master == NULL) {
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LOG_ERR("master %s not found", DT_INST_BUS_LABEL(0));
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return -EINVAL;
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}
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data->state = DMIC_STATE_INITIALIZED;
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return 0;
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}
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static struct mpxxdtyy_data mpxxdtyy_data;
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DEVICE_AND_API_INIT(mpxxdtyy, DT_INST_LABEL(0), mpxxdtyy_initialize,
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&mpxxdtyy_data, NULL, POST_KERNEL,
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CONFIG_AUDIO_DMIC_INIT_PRIORITY, &mpxxdtyy_driver_api);
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