Stephanos Ioannidis b63a028fbc arch: arm: aarch32: Rework non-Cortex-M context preservation ... The current context preservation implementation saves the spsr and lr_irq registers, which contain the cpsr and pc register values of the interrupted context, in the thread callee-saved block and this prevents nesting of interrupts because these values are required to be part of the exception stack frame to preserve the nested interrupt context. This commit reworks the AArch32 non-Cortex-M context preservation implementation to save the spsr and lr_irq registers in the exception stack frame to allow preservation of the nested interrupt context as well as the interrupted thread context. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>		2020-04-02 09:22:38 +02:00
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arc
arm	arch: arm: aarch32: Rework non-Cortex-M context preservation	2020-04-02 09:22:38 +02:00
common	tests: benchmarks: use high-res counter for MEC1501 SoC	2020-03-31 19:52:21 -04:00
nios2
posix
riscv
x86	arch: x86: Convert to new DT_INST macros	2020-03-26 03:29:23 -05:00
xtensa	xtensa: add calling entry point for multi-processing	2020-03-25 19:07:28 -04:00
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