mirror of
https://github.com/zephyrproject-rtos/zephyr
synced 2025-09-11 07:52:39 +00:00
9b0bb2b4af
* current supported boards: * emsk, iotdk, nsim, emsdp, hsdk. * for the unsupported future boards, pls take a reference of supported boards' board.cmake. * mdb runner is required and the default runner for SMP case, e.g., HSDK and nsim_hs_smp. * other ARC boards can also choose to use mdb by setting runner as mdb, e.g. west flash --runner mdb. * with mdb runner, user can make a debug through mdb gui * with arc_nsim or opencod runner (default runner), user can make a debug through gdb cmdline. Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
64 lines
1.0 KiB
Plaintext
64 lines
1.0 KiB
Plaintext
-arcv2em
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-core3
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-rgf_num_banks=2
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-rgf_banked_regs=32
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-rgf_num_wr_ports=2
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-Xcode_density
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-Xdiv_rem=radix2
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-turbo_boost
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-Xswap
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-Xbitscan
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-Xmpy_option=mpyd
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-mpu
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-mpu_regions=16
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-Xshift_assist
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-Xbarrel_shifter
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-Xdsp2
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-Xdsp_complex
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-Xdsp_divsqrt=radix2
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-Xdsp_itu
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-Xdsp_accshift=full
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-Xagu_large
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-Xagu_wb_depth=4
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-Xagu_accord
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-Xxy
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-Xxy_config=dccm_y
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-Xxy_size=8K
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-Xxy_interleave
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-Xxy_y_base=0xe0000000
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-Xfpus_div
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-Xfpu_mac
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-Xfpuda
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-Xfpus_mpy_slow
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-Xfpus_div_slow
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-Xtimer0
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-Xtimer0_level=1
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-Xtimer1
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-Xtimer1_level=0
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-action_points=2
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-Xstack_check
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-dmp_peripheral
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-smart_stack_entries=8
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-interrupts=20
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-interrupt_priorities=4
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-ext_interrupts=16
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-firq
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-interrupt_base=0x0
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-dcache=16384,32,2,a
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-dcache_feature=2
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-icache=16384,32,2,a
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-icache_feature=2
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-dccm_size=0x80000
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-dccm_base=0x80000000
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-dccm_interleave
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-iccm0_size=0x80000
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-iccm0_base=0x00000000
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-Xpct_counters=8
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-dmac
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-dmac_channels=2
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-dmac_registers=0
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-dmac_fifo_depth=2
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-dmac_int_config=single_internal
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-prop=nsim_mem-dev=uart0,base=0xf0000000,irq=24
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-noprofile
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