mirror of
https://github.com/zephyrproject-rtos/zephyr
synced 2025-09-12 13:51:56 +00:00
Enable SWO debug output during system initialization and not as part of GPIO driver initialization. After the modification the logger output becomes available earlier during the boot process. Also, it's not necessary anymore to build full GPIO driver only to enable SWO. This may be critical when building small images. Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
366 lines
9.7 KiB
C
366 lines
9.7 KiB
C
/*
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* Copyright (c) 2017, Christian Taedcke
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <errno.h>
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#include <drivers/gpio.h>
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#include <soc.h>
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#include <em_gpio.h>
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#include "gpio_utils.h"
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/*
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* Macros to set the GPIO MODE registers
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*
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* See https://www.silabs.com/documents/public/reference-manuals/EFM32WG-RM.pdf
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* pages 972 and 982.
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*/
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/**
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* @brief Create the value to set the GPIO MODEL register
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* @param[in] pin The index of the pin. Valid values are 0..7.
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* @param[in] mode The mode that should be set.
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* @return The value that can be set into the GPIO MODEL register.
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*/
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#define GECKO_GPIO_MODEL(pin, mode) (mode << (pin * 4))
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/**
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* @brief Create the value to set the GPIO MODEH register
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* @param[in] pin The index of the pin. Valid values are 8..15.
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* @param[in] mode The mode that should be set.
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* @return The value that can be set into the GPIO MODEH register.
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*/
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#define GECKO_GPIO_MODEH(pin, mode) (mode << ((pin - 8) * 4))
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#define member_size(type, member) sizeof(((type *)0)->member)
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#define NUMBER_OF_PORTS (member_size(GPIO_TypeDef, P) / \
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member_size(GPIO_TypeDef, P[0]))
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struct gpio_gecko_common_config {
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};
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struct gpio_gecko_common_data {
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/* a list of all ports */
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struct device *ports[NUMBER_OF_PORTS];
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size_t count;
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};
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struct gpio_gecko_config {
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GPIO_P_TypeDef *gpio_base;
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GPIO_Port_TypeDef gpio_index;
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};
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struct gpio_gecko_data {
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/* port ISR callback routine address */
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sys_slist_t callbacks;
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/* pin callback routine enable flags, by pin number */
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u32_t pin_callback_enables;
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};
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static inline void gpio_gecko_add_port(struct gpio_gecko_common_data *data,
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struct device *dev)
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{
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__ASSERT(dev, "No port device!");
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data->ports[data->count++] = dev;
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}
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static int gpio_gecko_configure(struct device *dev,
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int access_op, u32_t pin, int flags)
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{
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const struct gpio_gecko_config *config = dev->config->config_info;
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GPIO_P_TypeDef *gpio_base = config->gpio_base;
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GPIO_Port_TypeDef gpio_index = config->gpio_index;
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GPIO_Mode_TypeDef mode;
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unsigned int out = 0U;
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/* Check for an invalid pin configuration */
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if ((flags & GPIO_INT) && (flags & GPIO_DIR_OUT)) {
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return -EINVAL;
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}
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/* Interrupt on static level is not supported by the hardware */
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if ((flags & GPIO_INT) && !(flags & GPIO_INT_EDGE)) {
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return -ENOTSUP;
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}
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/* Setting interrupt flags for a complete port is not implemented */
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if ((flags & GPIO_INT) && (access_op == GPIO_ACCESS_BY_PORT)) {
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return -ENOTSUP;
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}
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if ((flags & GPIO_DIR_MASK) == GPIO_DIR_IN) {
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if ((flags & GPIO_PUD_MASK) == GPIO_PUD_PULL_UP) {
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mode = gpioModeInputPull;
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out = 1U; /* pull-up*/
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} else if ((flags & GPIO_PUD_MASK) == GPIO_PUD_PULL_DOWN) {
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mode = gpioModeInputPull;
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/* out = 0 means pull-down*/
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} else {
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mode = gpioModeInput;
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}
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} else { /* GPIO_DIR_OUT */
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mode = gpioModePushPull;
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}
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/* The flags contain options that require touching registers in the
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* GPIO module and the corresponding PORT module.
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*
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* Start with the GPIO module and set up the pin direction register.
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* 0 - pin is input, 1 - pin is output
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*/
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if (access_op == GPIO_ACCESS_BY_PIN) {
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GPIO_PinModeSet(gpio_index, pin, mode, out);
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} else { /* GPIO_ACCESS_BY_PORT */
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gpio_base->MODEL = GECKO_GPIO_MODEL(7, mode)
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| GECKO_GPIO_MODEL(6, mode) | GECKO_GPIO_MODEL(5, mode)
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| GECKO_GPIO_MODEL(4, mode) | GECKO_GPIO_MODEL(3, mode)
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| GECKO_GPIO_MODEL(2, mode) | GECKO_GPIO_MODEL(1, mode)
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| GECKO_GPIO_MODEL(0, mode);
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gpio_base->MODEH = GECKO_GPIO_MODEH(15, mode)
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| GECKO_GPIO_MODEH(14, mode)
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| GECKO_GPIO_MODEH(13, mode)
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| GECKO_GPIO_MODEH(12, mode)
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| GECKO_GPIO_MODEH(11, mode)
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| GECKO_GPIO_MODEH(10, mode)
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| GECKO_GPIO_MODEH(9, mode)
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| GECKO_GPIO_MODEH(8, mode);
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gpio_base->DOUT = (out ? 0xFFFF : 0x0000);
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}
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if (access_op == GPIO_ACCESS_BY_PIN) {
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GPIO_IntConfig(gpio_index, pin,
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(flags & GPIO_INT_ACTIVE_HIGH)
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|| (flags & GPIO_INT_DOUBLE_EDGE),
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!(flags & GPIO_INT_ACTIVE_HIGH)
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|| (flags & GPIO_INT_DOUBLE_EDGE),
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!!(flags & GPIO_INT));
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}
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return 0;
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}
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static int gpio_gecko_write(struct device *dev,
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int access_op, u32_t pin, u32_t value)
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{
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const struct gpio_gecko_config *config = dev->config->config_info;
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GPIO_P_TypeDef *gpio_base = config->gpio_base;
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if (access_op == GPIO_ACCESS_BY_PIN) {
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if (value) {
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/* Set the data output for the corresponding pin.
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* Writing zeros to the other bits leaves the data
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* output unchanged for the other pins.
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*/
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GPIO_PinOutSet(config->gpio_index, pin);
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} else {
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/* Clear the data output for the corresponding pin.
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* Writing zeros to the other bits leaves the data
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* output unchanged for the other pins.
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*/
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GPIO_PinOutClear(config->gpio_index, pin);
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}
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} else { /* GPIO_ACCESS_BY_PORT */
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/* Write the data output for all the pins */
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gpio_base->DOUT = value;
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}
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return 0;
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}
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static int gpio_gecko_read(struct device *dev,
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int access_op, u32_t pin, u32_t *value)
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{
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const struct gpio_gecko_config *config = dev->config->config_info;
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GPIO_P_TypeDef *gpio_base = config->gpio_base;
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*value = gpio_base->DIN;
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if (access_op == GPIO_ACCESS_BY_PIN) {
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*value = (*value & BIT(pin)) >> pin;
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}
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/* nothing more to do for GPIO_ACCESS_BY_PORT */
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return 0;
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}
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static int gpio_gecko_manage_callback(struct device *dev,
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struct gpio_callback *callback, bool set)
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{
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struct gpio_gecko_data *data = dev->driver_data;
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return gpio_manage_callback(&data->callbacks, callback, set);
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}
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static int gpio_gecko_enable_callback(struct device *dev,
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int access_op, u32_t pin)
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{
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struct gpio_gecko_data *data = dev->driver_data;
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if (access_op == GPIO_ACCESS_BY_PORT) {
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return -ENOTSUP;
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}
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data->pin_callback_enables |= BIT(pin);
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GPIO->IEN |= BIT(pin);
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return 0;
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}
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static int gpio_gecko_disable_callback(struct device *dev,
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int access_op, u32_t pin)
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{
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struct gpio_gecko_data *data = dev->driver_data;
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if (access_op == GPIO_ACCESS_BY_PORT) {
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return -ENOTSUP;
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}
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data->pin_callback_enables &= ~BIT(pin);
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GPIO->IEN &= ~BIT(pin);
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return 0;
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}
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/**
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* Handler for both odd and even pin interrupts
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*/
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static void gpio_gecko_common_isr(void *arg)
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{
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struct device *dev = (struct device *)arg;
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struct gpio_gecko_common_data *data = dev->driver_data;
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u32_t enabled_int, int_status;
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struct device *port_dev;
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struct gpio_gecko_data *port_data;
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int_status = GPIO->IF;
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for (unsigned int i = 0; int_status && (i < data->count); i++) {
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port_dev = data->ports[i];
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port_data = port_dev->driver_data;
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enabled_int = int_status & port_data->pin_callback_enables;
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int_status &= ~enabled_int;
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gpio_fire_callbacks(&port_data->callbacks, port_dev,
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enabled_int);
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}
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/* Clear the pending interrupts */
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GPIO->IFC = 0xFFFF;
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}
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static const struct gpio_driver_api gpio_gecko_driver_api = {
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.config = gpio_gecko_configure,
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.write = gpio_gecko_write,
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.read = gpio_gecko_read,
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.manage_callback = gpio_gecko_manage_callback,
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.enable_callback = gpio_gecko_enable_callback,
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.disable_callback = gpio_gecko_disable_callback,
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};
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static const struct gpio_driver_api gpio_gecko_common_driver_api = {
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.manage_callback = gpio_gecko_manage_callback,
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.enable_callback = gpio_gecko_enable_callback,
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.disable_callback = gpio_gecko_disable_callback,
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};
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#ifdef CONFIG_GPIO_GECKO
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static int gpio_gecko_common_init(struct device *dev);
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static const struct gpio_gecko_common_config gpio_gecko_common_config = {
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};
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static struct gpio_gecko_common_data gpio_gecko_common_data;
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DEVICE_AND_API_INIT(gpio_gecko_common, DT_GPIO_GECKO_COMMON_NAME,
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gpio_gecko_common_init,
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&gpio_gecko_common_data, &gpio_gecko_common_config,
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POST_KERNEL, CONFIG_GPIO_GECKO_COMMON_INIT_PRIORITY,
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&gpio_gecko_common_driver_api);
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static int gpio_gecko_common_init(struct device *dev)
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{
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gpio_gecko_common_data.count = 0;
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IRQ_CONNECT(GPIO_EVEN_IRQn, DT_GPIO_GECKO_COMMON_EVEN_PRI,
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gpio_gecko_common_isr, DEVICE_GET(gpio_gecko_common), 0);
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IRQ_CONNECT(GPIO_ODD_IRQn, DT_GPIO_GECKO_COMMON_ODD_PRI,
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gpio_gecko_common_isr, DEVICE_GET(gpio_gecko_common), 0);
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irq_enable(GPIO_EVEN_IRQn);
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irq_enable(GPIO_ODD_IRQn);
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return 0;
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}
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#endif /* CONFIG_GPIO_GECKO */
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#define GPIO_PORT_INIT(pl, pu) \
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static int gpio_gecko_port##pl##_init(struct device *dev); \
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\
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static const struct gpio_gecko_config gpio_gecko_port##pl##_config = { \
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.gpio_base = &GPIO->P[gpioPort##pu], \
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.gpio_index = gpioPort##pu, \
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}; \
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\
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static struct gpio_gecko_data gpio_gecko_port##pl##_data; \
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\
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DEVICE_AND_API_INIT(gpio_gecko_port##pl, DT_GPIO_GECKO_PORT##pu##_NAME, \
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gpio_gecko_port##pl##_init, \
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&gpio_gecko_port##pl##_data, \
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&gpio_gecko_port##pl##_config, \
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POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT, \
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&gpio_gecko_driver_api); \
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\
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static int gpio_gecko_port##pl##_init(struct device *dev) \
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{ \
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gpio_gecko_add_port(&gpio_gecko_common_data, dev); \
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return 0; \
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}
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#ifdef CONFIG_GPIO_GECKO_PORTA
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GPIO_PORT_INIT(a, A)
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#endif /* CONFIG_GPIO_GECKO_PORTA */
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#ifdef CONFIG_GPIO_GECKO_PORTB
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GPIO_PORT_INIT(b, B)
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#endif /* CONFIG_GPIO_GECKO_PORTB */
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#ifdef CONFIG_GPIO_GECKO_PORTC
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GPIO_PORT_INIT(c, C)
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#endif /* CONFIG_GPIO_GECKO_PORTC */
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#ifdef CONFIG_GPIO_GECKO_PORTD
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GPIO_PORT_INIT(d, D)
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#endif /* CONFIG_GPIO_GECKO_PORTD */
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#ifdef CONFIG_GPIO_GECKO_PORTE
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GPIO_PORT_INIT(e, E)
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#endif /* CONFIG_GPIO_GECKO_PORTE */
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#ifdef CONFIG_GPIO_GECKO_PORTF
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GPIO_PORT_INIT(f, F)
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#endif /* CONFIG_GPIO_GECKO_PORTF */
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#ifdef CONFIG_GPIO_GECKO_PORTG
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GPIO_PORT_INIT(g, G)
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#endif /* CONFIG_GPIO_GECKO_PORTG */
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#ifdef CONFIG_GPIO_GECKO_PORTH
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GPIO_PORT_INIT(h, H)
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#endif /* CONFIG_GPIO_GECKO_PORTH */
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#ifdef CONFIG_GPIO_GECKO_PORTI
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GPIO_PORT_INIT(i, I)
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#endif /* CONFIG_GPIO_GECKO_PORTI */
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#ifdef CONFIG_GPIO_GECKO_PORTJ
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GPIO_PORT_INIT(j, J)
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#endif /* CONFIG_GPIO_GECKO_PORTJ */
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#ifdef CONFIG_GPIO_GECKO_PORTK
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GPIO_PORT_INIT(k, K)
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#endif /* CONFIG_GPIO_GECKO_PORTK */
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