zephyr/dts/riscv
Mateusz Holenko 65e4178071 boards: litex_vexriscv: dts: Reorder liteeth registers
This is just a cosmetic change to avoid a warning:
"unit-address and first reg (0xb0000000)
don't match for ethernet@e0009800"

Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
2019-12-18 10:35:15 +02:00
..
microsemi-miv.dtsi
riscv32-fe310.dtsi
riscv32-litex-vexriscv.dtsi
rv32m1_ri5cy.dtsi
rv32m1_zero_riscy.dtsi
rv32m1.dtsi