mirror of
https://github.com/zephyrproject-rtos/zephyr
synced 2025-09-10 16:51:57 +00:00
ac74d8b652
Replace the existing Apache 2.0 boilerplate header with an SPDX tag throughout the zephyr code tree. This patch was generated via a script run over the master branch. Also updated doc/porting/application.rst that had a dependency on line numbers in a literal include. Manually updated subsys/logging/sys_log.c that had a malformed header in the original file. Also cleanup several cases that already had a SPDX tag and we either got a duplicate or missed updating. Jira: ZEP-1457 Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c Signed-off-by: David B. Kinder <david.b.kinder@intel.com> Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
90 lines
2.0 KiB
C
90 lines
2.0 KiB
C
/*
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* Copyright (c) 2013-2014 Wind River Systems, Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief Freescale K20 microprocessor Pin Control register definitions
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*
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* This module defines the PCR (Port/Pin Control/Configuration Registers) for
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* the K20 Family of microprocessors
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*/
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#ifndef _K20PCR_H_
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#define _K20PCR_H_
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#include <stdint.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define PCR_PORT_A 0
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#define PCR_PORT_B 1
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#define PCR_PORT_C 2
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#define PCR_PORT_D 3
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#define PCR_PORT_E 4
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#define PCR_MUX_DISABLED 0
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#define PCR_MUX_ALT1 1
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#define PCR_MUX_ALT2 2
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#define PCR_MUX_ALT3 3
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#define PCR_MUX_ALT4 4
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#define PCR_MUX_ALT5 5
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#define PCR_MUX_ALT6 6
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#define PCR_MUX_ALT7 7
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union K20_PCR {
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uint32_t value;
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struct {
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uint8_t ps : 1 __packed;
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uint8_t pe : 1 __packed;
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uint8_t sre : 1 __packed;
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uint8_t res_3 : 1 __packed;
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uint8_t pfe : 1 __packed;
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uint8_t ode : 1 __packed;
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uint8_t dse : 1 __packed;
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uint8_t res_7 : 1 __packed;
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uint8_t mux : 3 __packed;
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uint8_t res_11_14 : 4 __packed;
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uint8_t lk : 1 __packed;
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uint8_t irqc : 4 __packed;
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uint8_t res_20_23 : 4 __packed;
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uint8_t isf : 1 __packed;
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uint8_t res_25_31 : 7 __packed;
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} field;
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}; /* Pin Control Register n, n= 0-31 */
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union K20_GPC {
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uint32_t value;
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struct {
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uint16_t gpwe : 16 __packed;
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uint16_t gpwd : 16 __packed;
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} field;
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}; /* Global Pin Control Low/High Register */
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/* K20 Microntroller PCR module register structure */
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struct K20_PORT_PCR {
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struct {
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union K20_PCR pcr[32] __packed; /* 0x00-07C */
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union K20_GPC gpchr __packed; /* 0x80 */
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union K20_GPC gpclr __packed; /* 0x84 */
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uint8_t res_88_9F[0xA0 - 0x88]; /* 0x88-0x9F Reserved */
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uint32_t isfr __packed; /* 0xA0 */
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uint8_t res_A4_FF[0x1000 - 0xA4]; /* 0xA4-0xFFF Reserved */
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} port[5];
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};
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/* pin control register for port A..E on pin 0..31 */
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#define K20_PCR(base, port, pin) \
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((union K20_PCR *)(base + (0x1000 * port) + (pin * 4)))
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#ifdef __cplusplus
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}
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#endif
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#endif /* _K20PCR_H_ */
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