zephyr/drivers/interrupt_controller
Kumar Gala 95f78bcacf interrupt: Convert RISC-V plic to use multi-level irq support
Utilize the multi-level irq infrastructure and replace custom handling
for PLIC on riscv-privilege SoCs.  The old code offset IRQs in drivers
and various places with RISCV_MAX_GENERIC_IRQ.  Instead utilize Zephyr's
encoded IRQ and replace offsets in drivers with the IRQ define from DTS.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-09-10 07:34:57 -05:00
..
arcv2_irq_unit.c
cavs_ictl.c
cavs_ictl.h
CMakeLists.txt
dw_ictl.c
dw_ictl.h
exti_stm32.c
exti_stm32.h
gic-400.c
ioapic_intr.c
ioapic_priv.h
Kconfig
Kconfig.multilevel
Kconfig.multilevel.aggregator_template
Kconfig.rv32m1
Kconfig.s1000
Kconfig.sam0
Kconfig.shared_irq
Kconfig.stm32
loapic_intr.c
loapic_spurious.S
plic.c
rv32m1_intmux.c
sam0_eic_priv.h
sam0_eic.c
sam0_eic.h
shared_irq.c
system_apic.c
vexriscv_litex.c