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https://github.com/zephyrproject-rtos/zephyr
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cffb2d8051
The driver can be tested using different networking emulation
approaches.
This approach will work across multiple Qemu instances. There can be
more than one Qemu instance, run using the following command. They
would appear to be on the same Ethernet network.
$ qemu-system-arm -M lm3s6965evb \
-serial stdio \
-net nic \
-net socket,mcast=230.0.0.1:1234 \
-kernel zephyr.elf
This approach will work with other virtualization technologies that
support connecting to a VDE switch, like VirtualBox and User Mode
Linux. The switch can be started using the following command.
$ vde_switch --sock /tmp/switch
Qemu can be connected to the switch using the following command.
$ qemu-system-arm -M lm3s6965evb \
-serial stdio \
-net nic \
-net vde,sock=/tmp/switch \
-kernel zephyr.elf
Signed-off-by: Fadhel Habeeb <fadhel@zilogic.com>
Signed-off-by: Nirav Parmar <niravparmar@zilogic.com>
Signed-off-by: Vijay Kumar B <vijaykumar@zilogic.com>
75 lines
2.0 KiB
C
75 lines
2.0 KiB
C
/* STELLARIS Ethernet Controller
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*
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* Copyright (c) 2018 Zilogic Systems
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ETH_STELLARIS_PRIV_H_
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#define ETH_STELLARIS_PRIV_H_
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#define ETH_MTU 1500
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#define DEV_DATA(dev) \
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((struct eth_stellaris_runtime *)(dev)->driver_data)
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#define DEV_CFG(dev) \
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((struct eth_stellaris_config *const)(dev)->config->config_info)
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/*
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* Register mapping
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*/
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/* Registers for ethernet system, mac_base + offset */
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#define REG_MACRIS ((DEV_CFG(dev)->mac_base) + 0x000)
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#define REG_MACIM ((DEV_CFG(dev)->mac_base) + 0x004)
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#define REG_MACRCTL ((DEV_CFG(dev)->mac_base) + 0x008)
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#define REG_MACTCTL ((DEV_CFG(dev)->mac_base) + 0x00C)
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#define REG_MACDATA ((DEV_CFG(dev)->mac_base) + 0x010)
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#define REG_MACIA0 ((DEV_CFG(dev)->mac_base) + 0x014)
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#define REG_MACIA1 ((DEV_CFG(dev)->mac_base) + 0x018)
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#define REG_MACNP ((DEV_CFG(dev)->mac_base) + 0x034)
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#define REG_MACTR ((DEV_CFG(dev)->mac_base) + 0x038)
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/* ETH MAC Receive Control bit fields set value */
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#define BIT_MACRCTL_RSTFIFO 0x10
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#define BIT_MACRCTL_BADCRC 0x8
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#define BIT_MACRCTL_RXEN 0x1
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#define BIT_MACRCTL_PRMS 0x4
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/* ETH MAC Transmit Control bit fields set value */
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#define BIT_MACTCTL_DUPLEX 0x10
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#define BIT_MACTCTL_CRC 0x4
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#define BIT_MACTCTL_PADEN 0x2
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#define BIT_MACTCTL_TXEN 0x1
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/* ETH MAC Txn req bit fields set value */
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#define BIT_MACTR_NEWTX 0x1
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/* Ethernet MAC RAW Interrupt Status/Ack bit set values */
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#define BIT_MACRIS_RXINT 0x1
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#define BIT_MACRIS_TXER 0x2
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#define BIT_MACRIS_TXEMP 0x4
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#define BIT_MACRIS_FOV 0x8
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#define BIT_MACRIS_RXER 0x10
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struct eth_stellaris_runtime {
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struct net_if *iface;
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u8_t mac_addr[6];
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struct k_sem tx_sem;
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bool tx_err;
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u32_t tx_word;
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int tx_pos;
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#if defined(CONFIG_NET_STATISTICS_ETHERNET)
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struct net_stats_eth stats;
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#endif
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};
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typedef void (*eth_stellaris_config_irq_t)(struct device *dev);
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struct eth_stellaris_config {
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u32_t mac_base;
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u32_t sys_ctrl_base;
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u32_t irq_num;
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eth_stellaris_config_irq_t config_func;
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};
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#endif /* ETH_STELLARIS_PRIV_H_ */
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