mirror of
https://github.com/zephyrproject-rtos/zephyr
synced 2025-08-16 21:26:04 +00:00
20202902f2
These changes were obtained by running a script created by
Ulf Magnusson <Ulf.Magnusson@nordicsemi.no> for the following
specification:
1. Read the contents of all dts_fixup.h files in Zephyr
2. Check the left-hand side of the #define macros (i.e. the X in
#define X Y)
3. Check if that name is also the name of a Kconfig option
3.a If it is, then do nothing
3.b If it is not, then replace CONFIG_ with DT_ or add DT_ if it
has neither of these two prefixes
4. Replace the use of the changed #define in the code itself
(.c, .h, .ld)
Additionally, some tweaks had to be added to this script to catch some
of the macros used in the code in a parameterized form, e.g.:
- CONFIG_GPIO_STM32_GPIO##__SUFFIX##_BASE_ADDRESS
- CONFIG_UART_##idx##_TX_PIN
- I2C_SBCON_##_num##_BASE_ADDR
and to prevent adding DT_ prefix to the following symbols:
- FLASH_START
- FLASH_SIZE
- SRAM_START
- SRAM_SIZE
- _ROM_ADDR
- _ROM_SIZE
- _RAM_ADDR
- _RAM_SIZE
which are surprisingly also defined in some dts_fixup.h files.
Finally, some manual corrections had to be done as well:
- name##_IRQ -> DT_##name##_IRQ in uart_stm32.c
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
147 lines
3.1 KiB
C
147 lines
3.1 KiB
C
/*
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* Copyright (c) 2017 Google LLC.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <errno.h>
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#include <device.h>
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#include <gpio.h>
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#include <soc.h>
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struct gpio_sam0_config {
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PortGroup *regs;
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};
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#define DEV_CFG(dev) \
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((const struct gpio_sam0_config *const)(dev)->config->config_info)
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static int gpio_sam0_config(struct device *dev, int access_op, u32_t pin,
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int flags)
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{
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const struct gpio_sam0_config *config = DEV_CFG(dev);
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PortGroup *regs = config->regs;
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u32_t mask = 1 << pin;
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bool is_out = (flags & GPIO_DIR_MASK) == GPIO_DIR_OUT;
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int pud = flags & GPIO_PUD_MASK;
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PORT_PINCFG_Type pincfg;
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if (access_op != GPIO_ACCESS_BY_PIN) {
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return -ENOTSUP;
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}
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/* Builds the configuration and writes it in one go */
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pincfg.reg = 0;
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pincfg.bit.INEN = 1;
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/* Direction */
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if (is_out) {
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regs->DIRSET.bit.DIRSET = mask;
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} else {
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regs->DIRCLR.bit.DIRCLR = mask;
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}
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/* Pull up / pull down */
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if (is_out && pud != GPIO_PUD_NORMAL) {
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return -ENOTSUP;
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}
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switch (pud) {
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case GPIO_PUD_NORMAL:
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break;
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case GPIO_PUD_PULL_UP:
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pincfg.bit.PULLEN = 1;
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regs->OUTSET.reg = mask;
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break;
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case GPIO_PUD_PULL_DOWN:
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pincfg.bit.PULLEN = 1;
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regs->OUTCLR.reg = mask;
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break;
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default:
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return -ENOTSUP;
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}
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/* Write the now-built pin configuration */
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regs->PINCFG[pin] = pincfg;
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if ((flags & GPIO_INT) != 0) {
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/* TODO(mlhx): implement. */
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return -ENOTSUP;
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}
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if ((flags & GPIO_POL_MASK) != GPIO_POL_NORMAL) {
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return -ENOTSUP;
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}
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return 0;
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}
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static int gpio_sam0_write(struct device *dev, int access_op, u32_t pin,
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u32_t value)
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{
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const struct gpio_sam0_config *config = DEV_CFG(dev);
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u32_t mask = 1 << pin;
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if (access_op != GPIO_ACCESS_BY_PIN) {
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/* TODO(mlhx): support GPIO_ACCESS_BY_PORT */
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return -ENOTSUP;
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}
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if (value != 0) {
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config->regs->OUTSET.bit.OUTSET = mask;
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} else {
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config->regs->OUTCLR.bit.OUTCLR = mask;
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}
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return 0;
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}
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static int gpio_sam0_read(struct device *dev, int access_op, u32_t pin,
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u32_t *value)
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{
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const struct gpio_sam0_config *config = DEV_CFG(dev);
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u32_t bits;
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if (access_op != GPIO_ACCESS_BY_PIN) {
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/* TODO(mlhx): support GPIO_ACCESS_BY_PORT */
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return -ENOTSUP;
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}
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bits = config->regs->IN.bit.IN;
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*value = (bits >> pin) & 1;
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return 0;
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}
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static const struct gpio_driver_api gpio_sam0_api = {
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.config = gpio_sam0_config,
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.write = gpio_sam0_write,
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.read = gpio_sam0_read,
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};
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static int gpio_sam0_init(struct device *dev) { return 0; }
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/* Port A */
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#ifdef DT_GPIO_SAM0_PORTA_BASE_ADDRESS
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static const struct gpio_sam0_config gpio_sam0_config_0 = {
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.regs = (PortGroup *)DT_GPIO_SAM0_PORTA_BASE_ADDRESS,
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};
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DEVICE_AND_API_INIT(gpio_sam0_0, DT_GPIO_SAM0_PORTA_LABEL, gpio_sam0_init,
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NULL, &gpio_sam0_config_0, POST_KERNEL,
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CONFIG_KERNEL_INIT_PRIORITY_DEVICE, &gpio_sam0_api);
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#endif
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/* Port B */
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#ifdef DT_GPIO_SAM0_PORTB_BASE_ADDRESS
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static const struct gpio_sam0_config gpio_sam0_config_1 = {
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.regs = (PortGroup *)DT_GPIO_SAM0_PORTB_BASE_ADDRESS,
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};
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DEVICE_AND_API_INIT(gpio_sam0_1, DT_GPIO_SAM0_PORTB_LABEL, gpio_sam0_init,
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NULL, &gpio_sam0_config_1, POST_KERNEL,
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CONFIG_KERNEL_INIT_PRIORITY_DEVICE, &gpio_sam0_api);
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#endif
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