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https://github.com/zephyrproject-rtos/zephyr
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ac74d8b652
Replace the existing Apache 2.0 boilerplate header with an SPDX tag throughout the zephyr code tree. This patch was generated via a script run over the master branch. Also updated doc/porting/application.rst that had a dependency on line numbers in a literal include. Manually updated subsys/logging/sys_log.c that had a malformed header in the original file. Also cleanup several cases that already had a SPDX tag and we either got a duplicate or missed updating. Jira: ZEP-1457 Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c Signed-off-by: David B. Kinder <david.b.kinder@intel.com> Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
91 lines
1.9 KiB
Plaintext
91 lines
1.9 KiB
Plaintext
# Kconfig.nrf5 - NRF5 UART configuration
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#
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# Copyright (c) 2016 Nordic Semiconductor ASA
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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menuconfig UART_NRF5
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bool "Nordic Semiconductor NRF5 family processor UART driver"
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default n
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select SERIAL_HAS_DRIVER
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depends on SOC_FAMILY_NRF5
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select GPIO_NRF5
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help
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This option enables the UART driver for Nordic Semiconductor nRF5
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family processors. Note that there is only one
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UART controller on nRF5 ICs.
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config UART_NRF5_NAME
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string "Device Name for Nordic Semiconductor nRF5 UART"
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default "UART_0"
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depends on UART_NRF5
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help
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This is the device name for UART, and is included in the device
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struct.
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config UART_NRF5_IRQ_PRI
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int "UART Interrupt Priority (Interrupt support)"
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range 0 1 if SOC_SERIES_NRF51X
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range 0 5 if SOC_SERIES_NRF52X
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default 1
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depends on UART_NRF5
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depends on UART_INTERRUPT_DRIVEN
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help
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The interrupt priority for UART port.
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config UART_NRF5_BAUD_RATE
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int "Baud Rate"
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range 1200 1000000
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default 115200
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depends on UART_NRF5
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help
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The baud rate for UART port to be set to at boot.
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config UART_NRF5_CLK_FREQ
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int
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default 16000000
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depends on UART_NRF5
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config UART_NRF5_FLOW_CONTROL
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bool "Enable Flow Control"
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default n
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depends on UART_NRF5
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help
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Enable Flow Control. If selected, additionally two pins, RTS and CTS
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has to be configured.
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config UART_NRF5_GPIO_TX_PIN
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int "TX Pin Number"
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range 0 31
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depends on UART_NRF5
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depends on GPIO_NRF5
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help
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The GPIO pin to use for TX.
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config UART_NRF5_GPIO_RX_PIN
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int "RX Pin Number"
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range 0 31
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depends on UART_NRF5
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depends on GPIO_NRF5
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help
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The GPIO pin to use for RX.
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config UART_NRF5_GPIO_RTS_PIN
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int "RTS Pin Number"
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range 0 31
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depends on UART_NRF5
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depends on GPIO_NRF5
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depends on UART_NRF5_FLOW_CONTROL
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help
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The GPIO pin to use for RTS.
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config UART_NRF5_GPIO_CTS_PIN
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int "CTS Pin Number"
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range 0 31
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depends on UART_NRF5
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depends on GPIO_NRF5
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depends on UART_NRF5_FLOW_CONTROL
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help
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The GPIO pin to use for CTS.
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