zephyr/samples/boards
Daniel Leung 2e7831562a samples: mec15xxevb_assy6853/pm: shorten wait after deep sleep
The origin for sleeping for 3ms after coming out of deep sleep
was to wait for PLL to lock so that UART would not send
garbage characters due to incorrect clock. In the deep sleep
code, it spins to wait for the PLL to lock so there is no need
to wait for 3ms in the app. So shorten it like other busy wait.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-04-10 07:48:33 -04:00
..
96b_argonkey
arc_secure_services
bbc_microbit
intel_s1000_crb
mec15xxevb_assy6853
nrf
olimex_stm32_e407
reel_board/mesh_badge
sensortile_box
up_squared/gpio_counter
boards.rst