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https://github.com/zephyrproject-rtos/zephyr
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a033683783
This commit renames the `cortex_r` directory under the AArch32 to `cortex_a_r`, in preparation for the AArch32 Cortex-A support. The rationale for this renaming is that the Cortex-A and Cortex-R share the same base design and the difference between them, other than the MPU vs. MMU, is minimal. Since most of the architecture port code and configurations will be shared between the Cortex-A and Cortex-R architectures, it is advantageous to have them together in the same directory. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
60 lines
1.3 KiB
C
60 lines
1.3 KiB
C
/* GCC specific test inline assembler functions and macros */
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/*
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* Copyright (c) 2015, Wind River Systems, Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef _TEST_ASM_INLINE_GCC_H
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#define _TEST_ASM_INLINE_GCC_H
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#if !defined(__GNUC__)
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#error test_asm_inline_gcc.h goes only with GCC
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#endif
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#if defined(CONFIG_X86)
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static inline void timestamp_serialize(void)
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{
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__asm__ __volatile__ (/* serialize */
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"xorl %%eax,%%eax;\n\t"
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"cpuid;\n\t"
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:
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:
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: "%eax", "%ebx", "%ecx", "%edx");
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}
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#elif defined(CONFIG_CPU_CORTEX_M)
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#include <arch/arm/aarch32/cortex_m/cmsis.h>
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static inline void timestamp_serialize(void)
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{
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/* isb is available in all Cortex-M */
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__ISB();
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}
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#elif defined(CONFIG_CPU_CORTEX_R)
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#include <arch/arm/aarch32/cortex_a_r/cpu.h>
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static inline void timestamp_serialize(void)
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{
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__ISB();
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}
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#elif defined(CONFIG_CPU_CORTEX_A)
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#include <arch/arm/aarch64/cpu.h>
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static inline void timestamp_serialize(void)
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{
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__ISB();
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}
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#elif defined(CONFIG_CPU_ARCV2)
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#define timestamp_serialize()
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#elif defined(CONFIG_ARCH_POSIX)
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#define timestamp_serialize()
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#elif defined(CONFIG_XTENSA)
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#define timestamp_serialize()
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#elif defined(CONFIG_NIOS2)
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#define timestamp_serialize()
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#elif defined(CONFIG_RISCV)
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#define timestamp_serialize()
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#else
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#error implementation of timestamp_serialize() not provided for your CPU target
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#endif
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#endif /* _TEST_ASM_INLINE_GCC_H */
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