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https://github.com/zephyrproject-rtos/zephyr
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cff0005a87
Move the SoC outside of the architecture tree and put them at the same level as boards and architectures allowing both SoCs and boards to be maintained outside the tree. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
69 lines
1.2 KiB
C
69 lines
1.2 KiB
C
/*
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* Copyright (c) 2010-2015, Wind River Systems, Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief Board configuration macros for the ia32 platform
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*
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* This header file is used to specify and describe board-level aspects for
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* the 'ia32' platform.
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*/
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#ifndef __SOC_H_
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#define __SOC_H_
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#include <misc/util.h>
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#ifndef _ASMLANGUAGE
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#include <device.h>
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#include <random/rand32.h>
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#endif
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#define INT_VEC_IRQ0 0x20 /* vector number for IRQ0 */
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/*
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* UART
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*/
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#define UART_NS16550_ACCESS_IOPORT
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/* PCI definitions */
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/* FIXME: The values below copied from generic ia32 soc, we need to get the
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* correct numbers for Atom and the minnowboard
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*
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* This is added now to get basic enumartion of devices and verify that PCI
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* driver is functional.
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*/
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#define PCI_BUS_NUMBERS 1
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#define PCI_CTRL_ADDR_REG 0xCF8
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#define PCI_CTRL_DATA_REG 0xCFC
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#define PCI_INTA 1
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#define PCI_INTB 2
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#define PCI_INTC 3
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#define PCI_INTD 4
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/**
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*
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* @brief Convert PCI interrupt PIN to IRQ
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*
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* @return IRQ number, -1 if the result is incorrect
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*
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*/
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static inline int pci_pin2irq(int bus, int dev, int pin)
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{
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ARG_UNUSED(bus);
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if ((pin < PCI_INTA) || (pin > PCI_INTD)) {
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return -1;
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}
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return 10 + (((pin + dev - 1) >> 1) & 1);
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}
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#endif /* __SOC_H_ */
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