mirror of
https://github.com/zephyrproject-rtos/zephyr
synced 2025-08-26 10:25:58 +00:00
STM32WB HCI driver requires definition of 2 RAM regions to support use of 3 shared memory sections: MAPPING_TABLE, MB_MEM1 and MB_MEM2. In linker.ld, under conditions of HCI driver to be enabled, define SRAM1 and SRAM2 based on input defined in stm32wb linker. Then define the 3 sections MAPPING_TABLE, MB_MEM1 and MB_MEM Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
15 lines
295 B
Plaintext
15 lines
295 B
Plaintext
/* linker.ld - Linker command/script file */
|
|
|
|
/*
|
|
* Copyright (c) 2019 Linaro Limited
|
|
*
|
|
* SPDX-License-Identifier: Apache-2.0
|
|
*/
|
|
|
|
#define RAM1_SIZE (10 * 1K)
|
|
#define RAM1_ADDR 0x20030000
|
|
#define RAM2_SIZE (20 * 1K)
|
|
#define RAM2_ADDR 0x20038000
|
|
|
|
#include <arch/arm/cortex_m/scripts/linker.ld>
|