zephyr/boards/arc/nsim/nsim.dtsi
Eugeniy Paltsev 499b4c9069 ARC: nSIM: DTS: switch UART clock-frequency to 50MHz
UART IP is clocked with 50MHz on HAPS by default. So switch
UART clock-frequency from 100MHz to 50MHz for nsim_* boards
so the binaries can be run on HAPS as well.

This property is dummy in case run in simulator (nSIM) so we
don't need to change anything in nSIM configuration files.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2020-11-10 14:02:11 -06:00

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/*
* Copyright (c) 2018, 2019, Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*/
/dts-v1/;
#include "skeleton.dtsi"
#include <mem.h>
#ifndef ICCM_ADDR
#define ICCM_ADDR 0
#endif
#ifndef ICCM_SIZE
#define ICCM_SIZE DT_SIZE_K(512)
#endif
#ifndef DCCM_ADDR
#define DCCM_ADDR 80000000
#endif
#ifndef DCCM_SIZE
#define DCCM_SIZE DT_SIZE_K(512)
#endif
/ {
cpus {
#address-cells = <1>;
#size-cells = <0>;
intc: arcv2-intc {
compatible = "snps,arcv2-intc";
interrupt-controller;
#interrupt-cells = <2>;
};
};
iccm0: iccm@ICCM_ADDR {
compatible = "arc,iccm";
reg = <DT_ADDR(ICCM_ADDR) ICCM_SIZE>;
};
dccm0: dccm@DCCM_ADDR {
compatible = "arc,dccm";
reg = <DT_ADDR(DCCM_ADDR) DCCM_SIZE>;
};
uart0: uart@f0000000 {
compatible = "ns16550";
clock-frequency = <50000000>;
reg = <0xf0000000 0x400>;
current-speed = <115200>;
label = "UART_0";
interrupt-parent = <&intc>;
interrupts = <24 1>;
};
chosen {
zephyr,sram = &dccm0;
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
};
};