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https://github.com/zephyrproject-rtos/zephyr
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fad20c42c6
Typically we have ARC core configurations where Fast IRQs (FIRQ) are enabled together with multiple register files and those we have covered by testing. But FIRQ & single register bank we only happen to have on the older EMSK v2.2.it might be a good idea to add a similar configuration to nSIM "boards" so that we keep it tested regularly. nsim_em7d_v22 configuration is similar with em_staterkit_em7d_v22, both configed with FIRQ & single register bank. Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
19 lines
261 B
Plaintext
19 lines
261 B
Plaintext
/*
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* Copyright (c) 2018, 2019, 2020, Synopsys, Inc. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include "nsim_em.dtsi"
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/ {
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model = "snps,nsim_em";
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compatible = "snps,nsim_em";
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};
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&cpu0 {
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clock-frequency = <5000000>;
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};
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