Carles Cufi b6109496ff arm: Cortex-M0: Adapt core register code to M0 ... The Cortex-M0(+) and in general processors that support only the ARMv6-M instruction set have a reduced set of registers and fields compared to the ARMv7-M compliant processors. This change goes through all core registers and disables or removes everything that is not part of the ARMv6-M architecture when compiling for Cortex-M0. Jira: ZEP-1497 Change-id: I13e2637bb730e69d02f2a5ee687038dc69ad28a8 Signed-off-by: Vinayak Chettimada <vinayak.kariappa.chettimada@nordicsemi.no> Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no> Signed-off-by: Kumar Gala <kumar.gala@linaro.org>		2017-01-03 22:44:35 +00:00
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arc
arm	arm: Cortex-M0: Adapt core register code to M0	2017-01-03 22:44:35 +00:00
nios2
x86
cpu.h