zephyr/include
Carles Cufi b6109496ff arm: Cortex-M0: Adapt core register code to M0
The Cortex-M0(+) and in general processors that support only the ARMv6-M
instruction set have a reduced set of registers and fields compared to
the ARMv7-M compliant processors.
This change goes through all core registers and disables or removes
everything that is not part of the ARMv6-M architecture when compiling
for Cortex-M0.

Jira: ZEP-1497

Change-id: I13e2637bb730e69d02f2a5ee687038dc69ad28a8
Signed-off-by: Vinayak Chettimada <vinayak.kariappa.chettimada@nordicsemi.no>
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-01-03 22:44:35 +00:00
..
arch
bluetooth
debug
display
drivers
fs
linker
logging
misc
net
shell
toolchain
usb
adc.h
aio_comparator.h
atomic.h
cache.h
clock_control.h
counter.h
device.h
disk_access.h
dma.h
eth.h
flash.h
fs.h
gpio.h
i2c.h
init.h
ipm.h
irq_offload.h
irq.h
kernel_version.h
kernel.h
legacy.h
linker-defs.h
linker-tool-gcc.h
linker-tool.h
microkernel.h
nanokernel.h
pinmux.h
power.h
pwm.h
random.h
rtc.h
section_tags.h
sections.h
sensor.h
shared_irq.h
spi.h
sw_isr_table.h
sys_clock.h
sys_io.h
toolchain.h
uart.h
watchdog.h
zephyr.h