mirror of
https://github.com/zephyrproject-rtos/zephyr
synced 2025-08-06 20:55:48 +00:00
db6bfde8b3
Refactoring poll_out to be ready for handling preemption. uart_tx and uart_fifo_fill modified so they are resilient to being preempted by uart_poll_out. Refactored uart_poll_out implementation to be common for interrupt driven API and asynchronous API. In both APIs active state is detected by evaluating state of ENDTX and TXSTOPPED events. If anyone is set it means that new transfer can be started. Patch is fixing existing issues: - potential bytes dropping with flow control enabled - busywaiting for ENDTX (asynchronous API) - poor performance - potential bytes dropping during preemption - potential uart_tx returning -EBUSY when interrupted poll_out Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
367 lines
10 KiB
Plaintext
367 lines
10 KiB
Plaintext
# nrfx UART configuration
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# Copyright (c) 2016 - 2018, Nordic Semiconductor ASA
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# SPDX-License-Identifier: Apache-2.0
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menuconfig UART_NRFX
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bool "nRF UART nrfx drivers"
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default y
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select SERIAL_HAS_DRIVER
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select SERIAL_SUPPORT_INTERRUPT
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select SERIAL_SUPPORT_ASYNC
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depends on SOC_FAMILY_NRF
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help
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Enable support for nrfx UART drivers for nRF MCU series.
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Peripherals with the same instance ID cannot be used together,
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e.g. UART_0 and UARTE_0.
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if UART_NRFX
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# Workaround for not being able to have commas in macro arguments
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DT_COMPAT_NORDIC_NRF_UART := nordic,nrf-uart
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DT_COMPAT_NORDIC_NRF_UARTE := nordic,nrf-uarte
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# ----------------- port 0 -----------------
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config UART_0_NRF_UART
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def_bool $(dt_nodelabel_has_compat,uart0,$(DT_COMPAT_NORDIC_NRF_UART))
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select NRF_UART_PERIPHERAL
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help
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Enable nRF UART without EasyDMA on port 0.
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config UART_0_NRF_UARTE
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def_bool $(dt_nodelabel_has_compat,uart0,$(DT_COMPAT_NORDIC_NRF_UARTE))
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select NRF_UARTE_PERIPHERAL
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help
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Enable nRF UART with EasyDMA on port 0.
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if UART_0_NRF_UART || UART_0_NRF_UARTE
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config UART_0_ENHANCED_POLL_OUT
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bool "Efficient poll out on port 0"
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default y
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depends on UART_0_NRF_UARTE
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select NRFX_PPI if HAS_HW_NRF_PPI
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select NRFX_DPPI if HAS_HW_NRF_DPPIC
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help
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When enabled, polling out does not trigger interrupt which stops TX.
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Feature uses a PPI channel.
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config UART_0_INTERRUPT_DRIVEN
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bool "Enable interrupt support on port 0"
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depends on UART_INTERRUPT_DRIVEN
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default y
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help
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This option enables UART interrupt support on port 0.
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config UART_0_ASYNC
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bool "Enable Asynchronous API support on port 0"
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depends on UART_ASYNC_API && !UART_0_INTERRUPT_DRIVEN
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default y
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help
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This option enables UART Asynchronous API support on port 0.
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config UART_0_NRF_PARITY_BIT
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bool "Enable parity bit"
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help
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Enable parity bit.
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config UART_0_NRF_TX_BUFFER_SIZE
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int "Size of RAM buffer"
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depends on UART_0_NRF_UARTE
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range 1 65535
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default 32
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help
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Size of the transmit buffer for API function: fifo_fill.
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This value is limited by range of TXD.MAXCNT register for
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particular SoC.
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config UART_0_NRF_HW_ASYNC
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bool "Use hardware RX byte counting"
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depends on UART_0_NRF_UARTE
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depends on UART_ASYNC_API
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help
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If default driver uses interrupts to count incoming bytes, it is possible
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that with higher speeds and/or high cpu load some data can be lost.
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It is recommended to use hardware byte counting in such scenarios.
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Hardware RX byte counting requires timer instance and one PPI channel
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config UART_0_NRF_HW_ASYNC_TIMER
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int "Timer instance"
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depends on UART_0_NRF_HW_ASYNC
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config UART_0_GPIO_MANAGEMENT
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bool "Enable GPIO management on port 0"
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depends on DEVICE_POWER_MANAGEMENT
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default y
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help
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If enabled, the driver will configure the GPIOs used by the uart to
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their default configuration when device is powered down. The GPIOs
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will be configured back to correct state when UART is powered up.
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endif # UART_0_NRF_UART || UART_0_NRF_UARTE
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# ----------------- port 1 -----------------
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config UART_1_NRF_UARTE
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def_bool $(dt_nodelabel_has_compat,uart1,$(DT_COMPAT_NORDIC_NRF_UARTE))
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select NRF_UARTE_PERIPHERAL
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help
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Enable nRF UART with EasyDMA on port 1.
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if UART_1_NRF_UARTE
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config UART_1_INTERRUPT_DRIVEN
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bool "Enable interrupt support on port 1"
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depends on UART_INTERRUPT_DRIVEN
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default y
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help
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This option enables UART interrupt support on port 1.
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config UART_1_ASYNC
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bool "Enable Asynchronous API support on port 1"
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depends on UART_ASYNC_API && !UART_1_INTERRUPT_DRIVEN
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default y
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help
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This option enables UART Asynchronous API support on port 1.
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config UART_1_ENHANCED_POLL_OUT
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bool "Efficient poll out on port 1"
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default y
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select NRFX_PPI if HAS_HW_NRF_PPI
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select NRFX_DPPI if HAS_HW_NRF_DPPIC
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help
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When enabled, polling out does not trigger interrupt which stops TX.
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Feature uses a PPI channel.
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config UART_1_NRF_PARITY_BIT
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bool "Enable parity bit"
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help
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Enable parity bit.
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config UART_1_NRF_TX_BUFFER_SIZE
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int "Size of RAM buffer"
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depends on UART_INTERRUPT_DRIVEN
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range 1 65535
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default 32
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help
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Size of the transmit buffer for API function: fifo_fill.
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This value is limited by range of TXD.MAXCNT register for
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particular SoC.
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config UART_1_NRF_HW_ASYNC
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bool "Use hardware RX byte counting"
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depends on UART_1_ASYNC
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help
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If default driver uses interrupts to count incoming bytes, it is possible
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that with higher speeds and/or high cpu load some data can be lost.
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It is recommended to use hardware byte counting in such scenarios.
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Hardware RX byte counting requires timer instance and one PPI channel
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config UART_1_NRF_HW_ASYNC_TIMER
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int "Timer instance"
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depends on UART_1_NRF_HW_ASYNC
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config UART_1_GPIO_MANAGEMENT
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bool "Enable GPIO management on port 1"
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depends on DEVICE_POWER_MANAGEMENT
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default y
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help
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If enabled, the driver will configure the GPIOs used by the uart to
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their default configuration when device is powered down. The GPIOs
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will be configured back to correct state when UART is powered up.
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endif # UART_1_NRF_UARTE
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# ----------------- port 2 -----------------
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config UART_2_NRF_UARTE
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def_bool $(dt_nodelabel_has_compat,uart2,$(DT_COMPAT_NORDIC_NRF_UARTE))
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select NRF_UARTE_PERIPHERAL
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help
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Enable nRF UART with EasyDMA on port 2.
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if UART_2_NRF_UARTE
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config UART_2_INTERRUPT_DRIVEN
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bool "Enable interrupt support on port 2"
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depends on UART_INTERRUPT_DRIVEN
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default y
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help
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This option enables UART interrupt support on port 2.
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config UART_2_ASYNC
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bool "Enable Asynchronous API support on port 2"
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depends on UART_ASYNC_API && !UART_2_INTERRUPT_DRIVEN
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default y
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help
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This option enables UART Asynchronous API support on port 2.
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config UART_2_ENHANCED_POLL_OUT
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bool "Efficient poll out on port 2"
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default y
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select NRFX_PPI if HAS_HW_NRF_PPI
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select NRFX_DPPI if HAS_HW_NRF_DPPIC
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help
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When enabled, polling out does not trigger interrupt which stops TX.
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Feature uses a PPI channel.
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config UART_2_NRF_PARITY_BIT
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bool "Enable parity bit"
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help
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Enable parity bit.
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config UART_2_NRF_TX_BUFFER_SIZE
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int "Size of RAM buffer"
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range 1 65535
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default 32
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help
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Size of the transmit buffer for API function: fifo_fill.
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This value is limited by range of TXD.MAXCNT register for
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particular SoC.
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config UART_2_NRF_HW_ASYNC
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bool "Use hardware RX byte counting"
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depends on UART_2_ASYNC
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help
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If default driver uses interrupts to count incoming bytes, it is possible
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that with higher speeds and/or high cpu load some data can be lost.
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It is recommended to use hardware byte counting in such scenarios.
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Hardware RX byte counting requires timer instance and one PPI channel
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config UART_2_NRF_HW_ASYNC_TIMER
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int "Timer instance"
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depends on UART_2_NRF_HW_ASYNC
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config UART_2_GPIO_MANAGEMENT
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bool "Enable GPIO management on port 2"
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depends on DEVICE_POWER_MANAGEMENT
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default y
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help
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If enabled, the driver will configure the GPIOs used by the uart to
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their default configuration when device is powered down. The GPIOs
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will be configured back to correct state when UART is powered up.
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endif # UART_2_NRF_UARTE
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# ----------------- port 3 -----------------
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config UART_3_NRF_UARTE
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def_bool $(dt_nodelabel_has_compat,uart3,$(DT_COMPAT_NORDIC_NRF_UARTE))
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select NRF_UARTE_PERIPHERAL
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help
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Enable nRF UART with EasyDMA on port 3.
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if UART_3_NRF_UARTE
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config UART_3_INTERRUPT_DRIVEN
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bool "Enable interrupt support on port 3"
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depends on UART_INTERRUPT_DRIVEN
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default y
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help
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This option enables UART interrupt support on port 3.
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config UART_3_ASYNC
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bool "Enable Asynchronous API support on port 3"
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depends on UART_ASYNC_API && !UART_3_INTERRUPT_DRIVEN
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default y
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help
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This option enables UART Asynchronous API support on port 3.
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config UART_3_ENHANCED_POLL_OUT
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bool "Efficient poll out on port 3"
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default y
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select NRFX_PPI if HAS_HW_NRF_PPI
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select NRFX_DPPI if HAS_HW_NRF_DPPIC
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help
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When enabled, polling out does not trigger interrupt which stops TX.
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Feature uses a PPI channel.
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config UART_3_NRF_PARITY_BIT
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bool "Enable parity bit"
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help
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Enable parity bit.
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config UART_3_NRF_TX_BUFFER_SIZE
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int "Size of RAM buffer"
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range 1 65535
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default 32
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help
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Size of the transmit buffer for API function: fifo_fill.
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This value is limited by range of TXD.MAXCNT register for
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particular SoC.
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config UART_3_NRF_HW_ASYNC
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bool "Use hardware RX byte counting"
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depends on UART_3_ASYNC
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help
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If default driver uses interrupts to count incoming bytes, it is possible
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that with higher speeds and/or high cpu load some data can be lost.
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It is recommended to use hardware byte counting in such scenarios.
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Hardware RX byte counting requires timer instance and one PPI channel
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config UART_3_NRF_HW_ASYNC_TIMER
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int "Timer instance"
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depends on UART_3_NRF_HW_ASYNC
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config UART_3_GPIO_MANAGEMENT
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bool "Enable GPIO management on port 3"
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depends on DEVICE_POWER_MANAGEMENT
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default y
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help
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If enabled, the driver will configure the GPIOs used by the uart to
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their default configuration when device is powered down. The GPIOs
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will be configured back to correct state when UART is powered up.
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endif # UART_3_NRF_UARTE
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config NRFX_TIMER0
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default y
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depends on UART_0_NRF_HW_ASYNC_TIMER = 0 || UART_1_NRF_HW_ASYNC_TIMER = 0 || \
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UART_3_NRF_HW_ASYNC_TIMER = 0 || UART_2_NRF_HW_ASYNC_TIMER = 0
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config NRFX_TIMER1
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default y
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depends on UART_0_NRF_HW_ASYNC_TIMER = 1 || UART_1_NRF_HW_ASYNC_TIMER = 1 || \
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UART_3_NRF_HW_ASYNC_TIMER = 1 || UART_2_NRF_HW_ASYNC_TIMER = 1
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config NRFX_TIMER2
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default y
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depends on UART_0_NRF_HW_ASYNC_TIMER = 2 || UART_1_NRF_HW_ASYNC_TIMER = 2 || \
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UART_3_NRF_HW_ASYNC_TIMER = 2 || UART_2_NRF_HW_ASYNC_TIMER = 2
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config NRFX_TIMER3
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default y
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depends on UART_0_NRF_HW_ASYNC_TIMER = 3 || UART_1_NRF_HW_ASYNC_TIMER = 3 || \
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UART_3_NRF_HW_ASYNC_TIMER = 3 || UART_2_NRF_HW_ASYNC_TIMER = 3
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config NRFX_TIMER4
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default y
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depends on UART_0_NRF_HW_ASYNC_TIMER = 4 || UART_1_NRF_HW_ASYNC_TIMER = 4 || \
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UART_3_NRF_HW_ASYNC_TIMER = 4 || UART_2_NRF_HW_ASYNC_TIMER = 4
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if UART_0_NRF_HW_ASYNC || UART_1_NRF_HW_ASYNC || UART_2_NRF_HW_ASYNC || UART_3_NRF_HW_ASYNC
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config NRFX_TIMER
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default y
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config NRFX_PPI
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depends on HAS_HW_NRF_PPI
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default y
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config NRFX_DPPI
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depends on HAS_HW_NRF_DPPIC
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default y
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config UARTE_NRF_HW_ASYNC
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bool
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default y
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endif
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config NRF_UART_PERIPHERAL
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bool
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config NRF_UARTE_PERIPHERAL
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bool
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endif # UART_NRFX
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