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zephyr/drivers/serial/uart_cc32xx.c
Tomasz Bursztyka 4dcfb5531c isr: Normalize usage of device instance through ISR 
The goal of this patch is to replace the 'void *' parameter by 'struct
device *' if they use such variable or just 'const void *' on all
relevant ISRs

This will avoid not-so-nice const qualifier tweaks when device instances
will be constant.

Note that only the ISR passed to IRQ_CONNECT are of interest here.

In order to do so, the script fix_isr.py below is necessary:

from pathlib import Path
import subprocess
import pickle
import mmap
import sys
import re
import os

cocci_template = """
@r_fix_isr_0
@
type ret_type;
identifier P;
identifier D;
@@
-ret_type <!fn!>(void *P)
+ret_type <!fn!>(const struct device *P)
{
 ...
(
 const struct device *D = (const struct device *)P;
|
 const struct device *D = P;
)
 ...
}

@r_fix_isr_1
@
type ret_type;
identifier P;
identifier D;
@@
-ret_type <!fn!>(void *P)
+ret_type <!fn!>(const struct device *P)
{
 ...
 const struct device *D;
 ...
(
 D = (const struct device *)P;
|
 D = P;
)
 ...
}

@r_fix_isr_2
@
type ret_type;
identifier A;
@@
-ret_type <!fn!>(void *A)
+ret_type <!fn!>(const void *A)
{
 ...
}

@r_fix_isr_3
@
const struct device *D;
@@
-<!fn!>((void *)D);
+<!fn!>(D);

@r_fix_isr_4
@
type ret_type;
identifier D;
identifier P;
@@
-ret_type <!fn!>(const struct device *P)
+ret_type <!fn!>(const struct device *D)
{
 ...
(
-const struct device *D = (const struct device *)P;
|
-const struct device *D = P;
)
 ...
}

@r_fix_isr_5
@
type ret_type;
identifier D;
identifier P;
@@
-ret_type <!fn!>(const struct device *P)
+ret_type <!fn!>(const struct device *D)
{
 ...
-const struct device *D;
...
(
-D = (const struct device *)P;
|
-D = P;
)
 ...
}
"""

def find_isr(fn):
    db = []
    data = None
    start = 0

    try:
        with open(fn, 'r+') as f:
            data = str(mmap.mmap(f.fileno(), 0).read())
    except Exception as e:
        return db

    while True:
        isr = ""
        irq = data.find('IRQ_CONNECT', start)
        while irq > -1:
            p = 1
            arg = 1
            p_o = data.find('(', irq)
            if p_o < 0:
                irq = -1
                break;

            pos = p_o + 1

            while p > 0:
                if data[pos] == ')':
                    p -= 1
                elif data[pos] == '(':
                    p += 1
                elif data[pos] == ',' and p == 1:
                    arg += 1

                if arg == 3:
                    isr += data[pos]

                pos += 1

            isr = isr.strip(',\\n\\t ')
            if isr not in db and len(isr) > 0:
                db.append(isr)

            start = pos
            break

        if irq < 0:
            break

    return db

def patch_isr(fn, isr_list):
    if len(isr_list) <= 0:
        return

    for isr in isr_list:
        tmplt = cocci_template.replace('<!fn!>', isr)
        with open('/tmp/isr_fix.cocci', 'w') as f:
            f.write(tmplt)

        cmd = ['spatch', '--sp-file', '/tmp/isr_fix.cocci', '--in-place', fn]

        subprocess.run(cmd)

def process_files(path):
    if path.is_file() and path.suffix in ['.h', '.c']:
        p = str(path.parent) + '/' + path.name
        isr_list = find_isr(p)
        patch_isr(p, isr_list)
    elif path.is_dir():
        for p in path.iterdir():
            process_files(p)

if len(sys.argv) < 2:
    print("You need to provide a dir/file path")
    sys.exit(1)

process_files(Path(sys.argv[1]))

And is run: ./fix_isr.py <zephyr root directory>

Finally, some files needed manual fixes such.

Fixes #27399

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-09-02 13:48:13 +02:00

324 lines
8.9 KiB
C
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/*
* Copyright (c) 2016-2017, Texas Instruments Incorporated
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT ti_cc32xx_uart
#include <kernel.h>
#include <arch/cpu.h>
#include <drivers/uart.h>
/* Driverlib includes */
#include <inc/hw_types.h>
#include <driverlib/rom.h>
#include <driverlib/rom_map.h>
#include <driverlib/prcm.h>
#include <driverlib/uart.h>
struct uart_cc32xx_dev_data_t {
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
uart_irq_callback_user_data_t cb; /**< Callback function pointer */
void *cb_data; /**< Callback function arg */
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
};
#define DEV_CFG(dev) \
((const struct uart_device_config * const)(dev)->config)
#define DEV_DATA(dev) \
((struct uart_cc32xx_dev_data_t * const)(dev)->data)
#define PRIME_CHAR '\r'
/* Forward decls: */
DEVICE_DECLARE(uart_cc32xx_0);
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
static void uart_cc32xx_isr(const struct device *dev);
#endif
static const struct uart_device_config uart_cc32xx_dev_cfg_0 = {
.base = (void *)DT_INST_REG_ADDR(0),
.sys_clk_freq = DT_INST_PROP_BY_PHANDLE(0, clocks, clock_frequency)
};
static struct uart_cc32xx_dev_data_t uart_cc32xx_dev_data_0 = {
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
.cb = NULL,
#endif
};
/*
* CC32XX UART has a configurable FIFO length, from 1 to 8 characters.
* However, the Zephyr console driver, and the Zephyr uart sample test, assume
* a RX FIFO depth of one: meaning, one interrupt == one character received.
* Keeping with this assumption, this driver leaves the FIFOs disabled,
* and at depth 1.
*/
static int uart_cc32xx_init(const struct device *dev)
{
const struct uart_device_config *config = DEV_CFG(dev);
MAP_PRCMPeripheralReset(PRCM_UARTA0);
/* This also calls MAP_UARTEnable() to enable the FIFOs: */
MAP_UARTConfigSetExpClk((unsigned long)config->base,
MAP_PRCMPeripheralClockGet(PRCM_UARTA0),
DT_INST_PROP(0, current_speed),
(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE
| UART_CONFIG_PAR_NONE));
MAP_UARTFlowControlSet((unsigned long)config->base,
UART_FLOWCONTROL_NONE);
/* Re-disable the FIFOs: */
MAP_UARTFIFODisable((unsigned long)config->base);
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
/* Clear any pending UART RX interrupts: */
MAP_UARTIntClear((unsigned long)config->base, UART_INT_RX);
IRQ_CONNECT(DT_INST_IRQN(0),
DT_INST_IRQ(0, priority),
uart_cc32xx_isr, DEVICE_GET(uart_cc32xx_0),
0);
irq_enable(DT_INST_IRQN(0));
/* Fill the tx fifo, so Zephyr console & shell subsystems get "primed"
* with first tx fifo empty interrupt when they first call
* uart_irq_tx_enable().
*/
MAP_UARTCharPutNonBlocking((unsigned long)config->base, PRIME_CHAR);
#endif
return 0;
}
static int uart_cc32xx_poll_in(const struct device *dev, unsigned char *c)
{
const struct uart_device_config *config = DEV_CFG(dev);
if (MAP_UARTCharsAvail((unsigned long)config->base)) {
*c = MAP_UARTCharGetNonBlocking((unsigned long)config->base);
} else {
return (-1);
}
return 0;
}
static void uart_cc32xx_poll_out(const struct device *dev, unsigned char c)
{
const struct uart_device_config *config = DEV_CFG(dev);
MAP_UARTCharPut((unsigned long)config->base, c);
}
static int uart_cc32xx_err_check(const struct device *dev)
{
const struct uart_device_config *config = DEV_CFG(dev);
unsigned long cc32xx_errs = 0L;
unsigned int z_err = 0U;
cc32xx_errs = MAP_UARTRxErrorGet((unsigned long)config->base);
/* Map cc32xx SDK uart.h defines to zephyr uart.h defines */
z_err = ((cc32xx_errs & UART_RXERROR_OVERRUN) ?
UART_ERROR_OVERRUN : 0) |
((cc32xx_errs & UART_RXERROR_BREAK) ? UART_BREAK : 0) |
((cc32xx_errs & UART_RXERROR_PARITY) ? UART_ERROR_PARITY : 0) |
((cc32xx_errs & UART_RXERROR_FRAMING) ? UART_ERROR_FRAMING : 0);
MAP_UARTRxErrorClear((unsigned long)config->base);
return (int)z_err;
}
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
static int uart_cc32xx_fifo_fill(const struct device *dev,
const uint8_t *tx_data,
int size)
{
const struct uart_device_config *config = DEV_CFG(dev);
unsigned int num_tx = 0U;
while ((size - num_tx) > 0) {
/* Send a character */
if (MAP_UARTCharPutNonBlocking((unsigned long)config->base,
tx_data[num_tx])) {
num_tx++;
} else {
break;
}
}
return (int)num_tx;
}
static int uart_cc32xx_fifo_read(const struct device *dev, uint8_t *rx_data,
const int size)
{
const struct uart_device_config *config = DEV_CFG(dev);
unsigned int num_rx = 0U;
while (((size - num_rx) > 0) &&
MAP_UARTCharsAvail((unsigned long)config->base)) {
/* Receive a character */
rx_data[num_rx++] =
MAP_UARTCharGetNonBlocking((unsigned long)config->base);
}
return num_rx;
}
static void uart_cc32xx_irq_tx_enable(const struct device *dev)
{
const struct uart_device_config *config = DEV_CFG(dev);
MAP_UARTIntEnable((unsigned long)config->base, UART_INT_TX);
}
static void uart_cc32xx_irq_tx_disable(const struct device *dev)
{
const struct uart_device_config *config = DEV_CFG(dev);
MAP_UARTIntDisable((unsigned long)config->base, UART_INT_TX);
}
static int uart_cc32xx_irq_tx_ready(const struct device *dev)
{
const struct uart_device_config *config = DEV_CFG(dev);
unsigned int int_status;
int_status = MAP_UARTIntStatus((unsigned long)config->base, 1);
return (int_status & UART_INT_TX);
}
static void uart_cc32xx_irq_rx_enable(const struct device *dev)
{
const struct uart_device_config *config = DEV_CFG(dev);
/* FIFOs are left disabled from reset, so UART_INT_RT flag not used. */
MAP_UARTIntEnable((unsigned long)config->base, UART_INT_RX);
}
static void uart_cc32xx_irq_rx_disable(const struct device *dev)
{
const struct uart_device_config *config = DEV_CFG(dev);
MAP_UARTIntDisable((unsigned long)config->base, UART_INT_RX);
}
static int uart_cc32xx_irq_tx_complete(const struct device *dev)
{
const struct uart_device_config *config = DEV_CFG(dev);
return (!MAP_UARTBusy((unsigned long)config->base));
}
static int uart_cc32xx_irq_rx_ready(const struct device *dev)
{
const struct uart_device_config *config = DEV_CFG(dev);
unsigned int int_status;
int_status = MAP_UARTIntStatus((unsigned long)config->base, 1);
return (int_status & UART_INT_RX);
}
static void uart_cc32xx_irq_err_enable(const struct device *dev)
{
/* Not yet used in zephyr */
}
static void uart_cc32xx_irq_err_disable(const struct device *dev)
{
/* Not yet used in zephyr */
}
static int uart_cc32xx_irq_is_pending(const struct device *dev)
{
const struct uart_device_config *config = DEV_CFG(dev);
unsigned int int_status;
int_status = MAP_UARTIntStatus((unsigned long)config->base, 1);
return (int_status & (UART_INT_TX | UART_INT_RX));
}
static int uart_cc32xx_irq_update(const struct device *dev)
{
return 1;
}
static void uart_cc32xx_irq_callback_set(const struct device *dev,
uart_irq_callback_user_data_t cb,
void *cb_data)
{
struct uart_cc32xx_dev_data_t * const dev_data = DEV_DATA(dev);
dev_data->cb = cb;
dev_data->cb_data = cb_data;
}
/**
* @brief Interrupt service routine.
*
* This simply calls the callback function, if one exists.
*
* Note: CC32XX UART Tx interrupts when ready to send; Rx interrupts when char
* received.
*
* @param arg Argument to ISR.
*
* @return N/A
*/
static void uart_cc32xx_isr(const struct device *dev)
{
const struct uart_device_config *config = DEV_CFG(dev);
struct uart_cc32xx_dev_data_t * const dev_data = DEV_DATA(dev);
unsigned long intStatus = MAP_UARTIntStatus((unsigned long)config->base,
1);
if (dev_data->cb) {
dev_data->cb(dev, dev_data->cb_data);
}
/*
* RX/TX interrupt should have been implicitly cleared by Zephyr UART
* clients calling uart_fifo_read() or uart_fifo_write().
* Still, clear any error interrupts here, as they're not yet handled.
*/
MAP_UARTIntClear((unsigned long)config->base,
intStatus & ~(UART_INT_RX | UART_INT_TX));
}
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
static const struct uart_driver_api uart_cc32xx_driver_api = {
.poll_in = uart_cc32xx_poll_in,
.poll_out = uart_cc32xx_poll_out,
.err_check = uart_cc32xx_err_check,
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
.fifo_fill = uart_cc32xx_fifo_fill,
.fifo_read = uart_cc32xx_fifo_read,
.irq_tx_enable = uart_cc32xx_irq_tx_enable,
.irq_tx_disable = uart_cc32xx_irq_tx_disable,
.irq_tx_ready = uart_cc32xx_irq_tx_ready,
.irq_rx_enable = uart_cc32xx_irq_rx_enable,
.irq_rx_disable = uart_cc32xx_irq_rx_disable,
.irq_tx_complete = uart_cc32xx_irq_tx_complete,
.irq_rx_ready = uart_cc32xx_irq_rx_ready,
.irq_err_enable = uart_cc32xx_irq_err_enable,
.irq_err_disable = uart_cc32xx_irq_err_disable,
.irq_is_pending = uart_cc32xx_irq_is_pending,
.irq_update = uart_cc32xx_irq_update,
.irq_callback_set = uart_cc32xx_irq_callback_set,
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
};
DEVICE_AND_API_INIT(uart_cc32xx_0, DT_INST_LABEL(0),
uart_cc32xx_init, &uart_cc32xx_dev_data_0,
&uart_cc32xx_dev_cfg_0,
PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
(void *)&uart_cc32xx_driver_api);
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