zephyr/drivers/ethernet/Kconfig.enc28j60
Ulf Magnusson bd6e04411e kconfig: Clean up header comments and make them consistent
Use this short header style in all Kconfig files:

    # <description>

    # <copyright>
    # <license>

    ...

Also change all <description>s from

    # Kconfig[.extension] - Foo-related options

to just

    # Foo-related options

It's clear enough that it's about Kconfig.

The <description> cleanup was done with this command, along with some
manual cleanup (big letter at the start, etc.)

    git ls-files '*Kconfig*' | \
        xargs sed -i -E '1 s/#\s*Kconfig[\w.-]*\s*-\s*/# /'

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-11-04 17:31:27 -05:00

59 lines
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# ETH_ENC28J60 Ethernet driver configuration options
# Copyright (c) 2015 Intel Corporation
# SPDX-License-Identifier: Apache-2.0
menuconfig ETH_ENC28J60
bool "ENC28J60C Ethernet Controller"
depends on SPI
help
ENC28J60C Stand-Alone Ethernet Controller
with SPI Interface
config ETH_ENC28J60_RX_THREAD_STACK_SIZE
int "Stack size for internal incoming packet handler"
depends on ETH_ENC28J60
default 800
help
Size of the stack used for internal thread which is ran for
incoming packet processing.
config ETH_ENC28J60_RX_THREAD_PRIO
int "Priority for internal incoming packet handler"
depends on ETH_ENC28J60
default 2
help
Priority level for internal thread which is ran for incoming
packet processing.
config ETH_ENC28J60_TIMEOUT
int "IP buffer timeout"
depends on ETH_ENC28J60
default 100
help
Given timeout in milliseconds. Maximum amount of time
that the driver will wait from the IP stack to get
a memory buffer before the Ethernet frame is dropped.
config ETH_ENC28J60_0
bool "ENC28J60C Ethernet port 0"
depends on ETH_ENC28J60
help
Include port 0 driver
if ETH_ENC28J60 && ETH_ENC28J60_0
config ETH_ENC28J60_0_FULL_DUPLEX
bool "ENC28J60 full duplex"
default y
help
Enable Full Duplex. Device is configured half duplex
when disabled.
config ETH_ENC28J60_0_GPIO_SPI_CS
bool "Manage SPI CS through a GPIO pin"
help
This option is useful if one needs to manage SPI CS through a GPIO
pin to by-pass the SPI controller's CS logic.
endif # ETH_ENC28J60 && ETH_ENC28J60_0