mirror of
https://github.com/zephyrproject-rtos/zephyr
synced 2025-09-03 06:41:56 +00:00
f7fffae8aa
Change all the Intel and Wind River code license from BSD-3 to Apache 2. Change-Id: Id8be2c1c161a06ea8a0b9f38e17660e11dbb384b Signed-off-by: Javier B Perez Hernandez <javier.b.perez.hernandez@linux.intel.com> Signed-off-by: Anas Nashif <anas.nashif@intel.com> Signed-off-by: Allan Stephens <allan.stephens@windriver.com> Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
94 lines
2.6 KiB
ArmAsm
94 lines
2.6 KiB
ArmAsm
/* fault_s.S - fault handlers for ARCv2 */
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/*
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* Copyright (c) 2014 Wind River Systems, Inc.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/*
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* DESCRIPTION
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* Fault handlers for ARCv2 processors.
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*/
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#define _ASMLANGUAGE
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#include <toolchain.h>
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#include <sections.h>
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#include <arch/cpu.h>
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#include "swap_macros.h"
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GTEXT(_Fault)
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GTEXT(__reset)
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GTEXT(__memory_error)
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GTEXT(__instruction_error)
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GTEXT(__ev_machine_check)
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GTEXT(__ev_tlb_miss_i)
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GTEXT(__ev_tlb_miss_d)
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GTEXT(__ev_prot_v)
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GTEXT(__ev_privilege_v)
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GTEXT(__ev_swi)
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GTEXT(__ev_trap)
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GTEXT(__ev_extension)
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GTEXT(__ev_div_zero)
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GTEXT(__ev_dc_error)
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GTEXT(__ev_maligned)
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GDATA(_firq_stack)
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SECTION_VAR(BSS, saved_stack_pointer)
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.word 0
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/*
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* @brief Fault handler installed in the fault and reserved vectors
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*/
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SECTION_SUBSEC_FUNC(TEXT,__fault,__memory_error)
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SECTION_SUBSEC_FUNC(TEXT,__fault,__instruction_error)
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SECTION_SUBSEC_FUNC(TEXT,__fault,__ev_machine_check)
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SECTION_SUBSEC_FUNC(TEXT,__fault,__ev_tlb_miss_i)
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SECTION_SUBSEC_FUNC(TEXT,__fault,__ev_tlb_miss_d)
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SECTION_SUBSEC_FUNC(TEXT,__fault,__ev_prot_v)
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SECTION_SUBSEC_FUNC(TEXT,__fault,__ev_privilege_v)
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SECTION_SUBSEC_FUNC(TEXT,__fault,__ev_swi)
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SECTION_SUBSEC_FUNC(TEXT,__fault,__ev_trap)
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SECTION_SUBSEC_FUNC(TEXT,__fault,__ev_extension)
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SECTION_SUBSEC_FUNC(TEXT,__fault,__ev_div_zero)
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SECTION_SUBSEC_FUNC(TEXT,__fault,__ev_dc_error)
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SECTION_SUBSEC_FUNC(TEXT,__fault,__ev_maligned)
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/*
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* Before invoking exception handler, the kernel switches to an exception
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* stack, which is really the FIRQ stack, to save the faulting thread's
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* registers. It can use the FIRQ stack because it knows it is unused
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* since it is save to assume that if an exception has happened in FIRQ
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* handler, the problem is fatal and all the kernel can do is just print
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* a diagnostic message and halt.
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*/
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st sp, [saved_stack_pointer]
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mov_s sp, _firq_stack
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add sp, sp, CONFIG_FIRQ_STACK_SIZE
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/* save caller saved registers */
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_create_irq_stack_frame
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jl _Fault
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/* if _Fault returns, restore the registers */
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_pop_irq_stack_frame
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/* now restore the stack */
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ld sp,[saved_stack_pointer]
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rtie
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