zephyr/soc
Sylvio Alves f22de9733b soc: esp32: riscv: fix interrupt allocator
Current interrupt allocator is not taking into account
reserved areas. In case of esp32c6, Wi-Fi isn't properly
configured, causing instability or even non-functional feature.
This adds the reserved area ranges for all risc-v based SoC and
unify the slot finding based on interrupt source.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2025-03-06 08:35:29 +00:00
..
adi/max32
altr
ambiq
amd/acp_6_0
andestech
antmicro/myra
arm
aspeed
atmel
brcm
cdns
common
efinix/sapphire
ene/kb1200
espressif soc: esp32: riscv: fix interrupt allocator 2025-03-06 08:35:29 +00:00
gaisler
gd/gd32
infineon
intel
ite/ec
litex/litex_vexriscv
lowrisc/opentitan
mediatek/mt8xxx
microchip
native/inf_clock
neorv32
nordic
nuvoton
nxp
openisa/rv32m1
qemu
quicklogic/eos_s3
raspberrypi/rpi_pico
realtek/ec
renesas
renode
rockchip
sensry
sifive/sifive_freedom
silabs
snps
st/stm32
starfive/jh71xx
telink/tlsr
ti
wch/ch32v
xen
xlnx
CMakeLists.txt
Kconfig
Kconfig.v1
Kconfig.v1.choice
Kconfig.v2