mirror of
https://github.com/zephyrproject-rtos/zephyr
synced 2025-09-03 11:41:55 +00:00
7c118882d2
These were part of latency_measure benchmark, but was used in all benchmarks. legacy symbols in timestamp.h were replaced to unified ones. Tick based checks have been replaced with ms based checks in line with the new APIs. Change-Id: I1d27310023be4cafbceccf50cb87d72b6681443d Signed-off-by: Jithu Joseph <jithu.joseph@intel.com>
40 lines
860 B
C
40 lines
860 B
C
/* GCC specific test inline assembler functions and macros */
|
|
|
|
/*
|
|
* Copyright (c) 2015, Wind River Systems, Inc.
|
|
*
|
|
* SPDX-License-Identifier: Apache-2.0
|
|
*/
|
|
|
|
#ifndef _TEST_ASM_INLINE_GCC_H
|
|
#define _TEST_ASM_INLINE_GCC_H
|
|
|
|
#if !defined(__GNUC__)
|
|
#error test_asm_inline_gcc.h goes only with GCC
|
|
#endif
|
|
|
|
#if defined(CONFIG_X86)
|
|
static inline void timestamp_serialize(void)
|
|
{
|
|
__asm__ __volatile__ (/* serialize */
|
|
"xorl %%eax,%%eax;\n\t"
|
|
"cpuid;\n\t"
|
|
:
|
|
:
|
|
: "%eax", "%ebx", "%ecx", "%edx");
|
|
}
|
|
#elif defined(CONFIG_CPU_CORTEX_M)
|
|
#include <arch/arm/cortex_m/cmsis.h>
|
|
static inline void timestamp_serialize(void)
|
|
{
|
|
/* isb is avaialble in all Cortex-M */
|
|
__ISB();
|
|
}
|
|
#elif defined(CONFIG_CPU_ARCV2)
|
|
#define timestamp_serialize()
|
|
#else
|
|
#error implementation of timestamp_serialize() not provided for your CPU target
|
|
#endif
|
|
|
|
#endif /* _TEST_ASM_INLINE_GCC_H */
|