mirror of
https://github.com/zephyrproject-rtos/zephyr
synced 2025-09-10 21:42:50 +00:00
aa9c14667b
Updates the mcux drivers and device header files for the k64 from mcux 2.1 to mcux 2.2. Updates the k6x soc init and ethernet shim driver to reflect mcux interface changes. Origin: NXP MCUXpresso SDK 2.2 URL: mcux.nxp.com Maintained-by: External Change-Id: Icb578dddbe84c190e990b756193bef621010a898 Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
351 lines
14 KiB
C
351 lines
14 KiB
C
/*
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* Copyright (c) 2015-2016, Freescale Semiconductor, Inc.
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* Copyright 2016-2017 NXP
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* o Redistributions of source code must retain the above copyright notice, this list
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* of conditions and the following disclaimer.
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*
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* o Redistributions in binary form must reproduce the above copyright notice, this
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* list of conditions and the following disclaimer in the documentation and/or
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* other materials provided with the distribution.
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*
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* o Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _FSL_COMMON_H_
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#define _FSL_COMMON_H_
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#include <assert.h>
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#include <stdbool.h>
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#include <stdint.h>
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#include <string.h>
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#if defined(__ICCARM__)
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#include <stddef.h>
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#endif
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#include "fsl_device_registers.h"
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/*!
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* @addtogroup ksdk_common
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* @{
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*/
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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/*! @brief Construct a status code value from a group and code number. */
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#define MAKE_STATUS(group, code) ((((group)*100) + (code)))
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/*! @brief Construct the version number for drivers. */
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#define MAKE_VERSION(major, minor, bugfix) (((major) << 16) | ((minor) << 8) | (bugfix))
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/* Debug console type definition. */
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#define DEBUG_CONSOLE_DEVICE_TYPE_NONE 0U /*!< No debug console. */
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#define DEBUG_CONSOLE_DEVICE_TYPE_UART 1U /*!< Debug console base on UART. */
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#define DEBUG_CONSOLE_DEVICE_TYPE_LPUART 2U /*!< Debug console base on LPUART. */
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#define DEBUG_CONSOLE_DEVICE_TYPE_LPSCI 3U /*!< Debug console base on LPSCI. */
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#define DEBUG_CONSOLE_DEVICE_TYPE_USBCDC 4U /*!< Debug console base on USBCDC. */
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#define DEBUG_CONSOLE_DEVICE_TYPE_FLEXCOMM 5U /*!< Debug console base on USBCDC. */
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#define DEBUG_CONSOLE_DEVICE_TYPE_IUART 6U /*!< Debug console base on i.MX UART. */
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/*! @brief Status group numbers. */
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enum _status_groups
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{
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kStatusGroup_Generic = 0, /*!< Group number for generic status codes. */
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kStatusGroup_FLASH = 1, /*!< Group number for FLASH status codes. */
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kStatusGroup_LPSPI = 4, /*!< Group number for LPSPI status codes. */
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kStatusGroup_FLEXIO_SPI = 5, /*!< Group number for FLEXIO SPI status codes. */
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kStatusGroup_DSPI = 6, /*!< Group number for DSPI status codes. */
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kStatusGroup_FLEXIO_UART = 7, /*!< Group number for FLEXIO UART status codes. */
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kStatusGroup_FLEXIO_I2C = 8, /*!< Group number for FLEXIO I2C status codes. */
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kStatusGroup_LPI2C = 9, /*!< Group number for LPI2C status codes. */
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kStatusGroup_UART = 10, /*!< Group number for UART status codes. */
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kStatusGroup_I2C = 11, /*!< Group number for UART status codes. */
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kStatusGroup_LPSCI = 12, /*!< Group number for LPSCI status codes. */
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kStatusGroup_LPUART = 13, /*!< Group number for LPUART status codes. */
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kStatusGroup_SPI = 14, /*!< Group number for SPI status code.*/
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kStatusGroup_XRDC = 15, /*!< Group number for XRDC status code.*/
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kStatusGroup_SEMA42 = 16, /*!< Group number for SEMA42 status code.*/
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kStatusGroup_SDHC = 17, /*!< Group number for SDHC status code */
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kStatusGroup_SDMMC = 18, /*!< Group number for SDMMC status code */
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kStatusGroup_SAI = 19, /*!< Group number for SAI status code */
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kStatusGroup_MCG = 20, /*!< Group number for MCG status codes. */
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kStatusGroup_SCG = 21, /*!< Group number for SCG status codes. */
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kStatusGroup_SDSPI = 22, /*!< Group number for SDSPI status codes. */
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kStatusGroup_FLEXIO_I2S = 23, /*!< Group number for FLEXIO I2S status codes */
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kStatusGroup_FLEXIO_MCULCD = 24, /*!< Group number for FLEXIO LCD status codes */
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kStatusGroup_FLASHIAP = 25, /*!< Group number for FLASHIAP status codes */
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kStatusGroup_FLEXCOMM_I2C = 26, /*!< Group number for FLEXCOMM I2C status codes */
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kStatusGroup_I2S = 27, /*!< Group number for I2S status codes */
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kStatusGroup_IUART = 28, /*!< Group number for IUART status codes */
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kStatusGroup_SDRAMC = 35, /*!< Group number for SDRAMC status codes. */
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kStatusGroup_POWER = 39, /*!< Group number for POWER status codes. */
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kStatusGroup_ENET = 40, /*!< Group number for ENET status codes. */
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kStatusGroup_PHY = 41, /*!< Group number for PHY status codes. */
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kStatusGroup_TRGMUX = 42, /*!< Group number for TRGMUX status codes. */
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kStatusGroup_SMARTCARD = 43, /*!< Group number for SMARTCARD status codes. */
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kStatusGroup_LMEM = 44, /*!< Group number for LMEM status codes. */
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kStatusGroup_QSPI = 45, /*!< Group number for QSPI status codes. */
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kStatusGroup_DMA = 50, /*!< Group number for DMA status codes. */
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kStatusGroup_EDMA = 51, /*!< Group number for EDMA status codes. */
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kStatusGroup_DMAMGR = 52, /*!< Group number for DMAMGR status codes. */
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kStatusGroup_FLEXCAN = 53, /*!< Group number for FlexCAN status codes. */
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kStatusGroup_LTC = 54, /*!< Group number for LTC status codes. */
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kStatusGroup_FLEXIO_CAMERA = 55, /*!< Group number for FLEXIO CAMERA status codes. */
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kStatusGroup_LPC_SPI = 56, /*!< Group number for LPC_SPI status codes. */
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kStatusGroup_LPC_USART = 57, /*!< Group number for LPC_USART status codes. */
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kStatusGroup_DMIC = 58, /*!< Group number for DMIC status codes. */
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kStatusGroup_SDIF = 59, /*!< Group number for SDIF status codes.*/
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kStatusGroup_SPIFI = 60, /*!< Group number for SPIFI status codes. */
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kStatusGroup_OTP = 61, /*!< Group number for OTP status codes. */
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kStatusGroup_MCAN = 62, /*!< Group number for MCAN status codes. */
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kStatusGroup_CAAM = 63, /*!< Group number for CAAM status codes. */
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kStatusGroup_ECSPI = 64, /*!< Group number for ECSPI status codes. */
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kStatusGroup_USDHC = 65, /*!< Group number for USDHC status codes.*/
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kStatusGroup_ESAI = 69, /*!< Group number for ESAI status codes. */
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kStatusGroup_FLEXSPI = 70, /*!< Group number for FLEXSPI status codes. */
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kStatusGroup_NOTIFIER = 98, /*!< Group number for NOTIFIER status codes. */
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kStatusGroup_DebugConsole = 99, /*!< Group number for debug console status codes. */
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kStatusGroup_ApplicationRangeStart = 100, /*!< Starting number for application groups. */
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};
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/*! @brief Generic status return codes. */
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enum _generic_status
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{
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kStatus_Success = MAKE_STATUS(kStatusGroup_Generic, 0),
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kStatus_Fail = MAKE_STATUS(kStatusGroup_Generic, 1),
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kStatus_ReadOnly = MAKE_STATUS(kStatusGroup_Generic, 2),
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kStatus_OutOfRange = MAKE_STATUS(kStatusGroup_Generic, 3),
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kStatus_InvalidArgument = MAKE_STATUS(kStatusGroup_Generic, 4),
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kStatus_Timeout = MAKE_STATUS(kStatusGroup_Generic, 5),
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kStatus_NoTransferInProgress = MAKE_STATUS(kStatusGroup_Generic, 6),
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};
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/*! @brief Type used for all status and error return values. */
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typedef int32_t status_t;
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/*
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* The fsl_clock.h is included here because it needs MAKE_VERSION/MAKE_STATUS/status_t
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* defined in previous of this file.
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*/
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#include "fsl_clock.h"
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/*
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* Chip level peripheral reset API, for MCUs that implement peripheral reset control external to a peripheral
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*/
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#if ((defined(FSL_FEATURE_SOC_SYSCON_COUNT) && (FSL_FEATURE_SOC_SYSCON_COUNT > 0)) || \
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(defined(FSL_FEATURE_SOC_ASYNC_SYSCON_COUNT) && (FSL_FEATURE_SOC_ASYNC_SYSCON_COUNT > 0)))
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#include "fsl_reset.h"
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#endif
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/*! @name Min/max macros */
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/* @{ */
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#if !defined(MIN)
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#define MIN(a, b) ((a) < (b) ? (a) : (b))
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#endif
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#if !defined(MAX)
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#define MAX(a, b) ((a) > (b) ? (a) : (b))
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#endif
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/* @} */
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/*! @brief Computes the number of elements in an array. */
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#if !defined(ARRAY_SIZE)
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#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
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#endif
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/*! @name UINT16_MAX/UINT32_MAX value */
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/* @{ */
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#if !defined(UINT16_MAX)
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#define UINT16_MAX ((uint16_t)-1)
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#endif
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#if !defined(UINT32_MAX)
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#define UINT32_MAX ((uint32_t)-1)
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#endif
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/* @} */
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/*! @name Timer utilities */
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/* @{ */
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/*! Macro to convert a microsecond period to raw count value */
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#define USEC_TO_COUNT(us, clockFreqInHz) (uint64_t)((uint64_t)us * clockFreqInHz / 1000000U)
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/*! Macro to convert a raw count value to microsecond */
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#define COUNT_TO_USEC(count, clockFreqInHz) (uint64_t)((uint64_t)count * 1000000U / clockFreqInHz)
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/*! Macro to convert a millisecond period to raw count value */
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#define MSEC_TO_COUNT(ms, clockFreqInHz) (uint64_t)((uint64_t)ms * clockFreqInHz / 1000U)
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/*! Macro to convert a raw count value to millisecond */
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#define COUNT_TO_MSEC(count, clockFreqInHz) (uint64_t)((uint64_t)count * 1000U / clockFreqInHz)
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/* @} */
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/*******************************************************************************
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* API
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******************************************************************************/
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#if defined(__cplusplus)
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extern "C" {
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#endif
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/*!
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* @brief Enable specific interrupt.
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*
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* Enable the interrupt not routed from intmux.
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*
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* @param interrupt The IRQ number.
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*/
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static inline void EnableIRQ(IRQn_Type interrupt)
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{
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if (NotAvail_IRQn == interrupt)
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{
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return;
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}
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#if defined(FSL_FEATURE_SOC_INTMUX_COUNT) && (FSL_FEATURE_SOC_INTMUX_COUNT > 0)
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if (interrupt < FSL_FEATURE_INTMUX_IRQ_START_INDEX)
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#endif
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{
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#if defined(__GIC_PRIO_BITS)
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GIC_EnableIRQ(interrupt);
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#else
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NVIC_EnableIRQ(interrupt);
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#endif
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}
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}
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/*!
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* @brief Disable specific interrupt.
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*
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* Disable the interrupt not routed from intmux.
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*
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* @param interrupt The IRQ number.
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*/
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static inline void DisableIRQ(IRQn_Type interrupt)
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{
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if (NotAvail_IRQn == interrupt)
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{
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return;
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}
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#if defined(FSL_FEATURE_SOC_INTMUX_COUNT) && (FSL_FEATURE_SOC_INTMUX_COUNT > 0)
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if (interrupt < FSL_FEATURE_INTMUX_IRQ_START_INDEX)
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#endif
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{
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#if defined(__GIC_PRIO_BITS)
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GIC_DisableIRQ(interrupt);
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#else
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NVIC_DisableIRQ(interrupt);
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#endif
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}
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}
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/*!
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* @brief Disable the global IRQ
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*
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* Disable the global interrupt and return the current primask register. User is required to provided the primask
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* register for the EnableGlobalIRQ().
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*
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* @return Current primask value.
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*/
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static inline uint32_t DisableGlobalIRQ(void)
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{
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#if defined(CPSR_I_Msk)
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uint32_t cpsr = __get_CPSR() & CPSR_I_Msk;
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__disable_irq();
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return cpsr;
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#else
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uint32_t regPrimask = __get_PRIMASK();
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__disable_irq();
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return regPrimask;
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#endif
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}
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/*!
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* @brief Enaable the global IRQ
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*
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* Set the primask register with the provided primask value but not just enable the primask. The idea is for the
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* convinience of integration of RTOS. some RTOS get its own management mechanism of primask. User is required to
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* use the EnableGlobalIRQ() and DisableGlobalIRQ() in pair.
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*
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* @param primask value of primask register to be restored. The primask value is supposed to be provided by the
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* DisableGlobalIRQ().
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*/
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static inline void EnableGlobalIRQ(uint32_t primask)
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{
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#if defined(CPSR_I_Msk)
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__set_CPSR((__get_CPSR() & ~CPSR_I_Msk) | primask);
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#else
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__set_PRIMASK(primask);
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#endif
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}
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/*!
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* @brief install IRQ handler
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*
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* @param irq IRQ number
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* @param irqHandler IRQ handler address
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* @return The old IRQ handler address
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*/
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uint32_t InstallIRQHandler(IRQn_Type irq, uint32_t irqHandler);
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#if (defined(FSL_FEATURE_SOC_SYSCON_COUNT) && (FSL_FEATURE_SOC_SYSCON_COUNT > 0))
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/*!
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* @brief Enable specific interrupt for wake-up from deep-sleep mode.
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*
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* Enable the interrupt for wake-up from deep sleep mode.
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* Some interrupts are typically used in sleep mode only and will not occur during
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* deep-sleep mode because relevant clocks are stopped. However, it is possible to enable
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* those clocks (significantly increasing power consumption in the reduced power mode),
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* making these wake-ups possible.
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*
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* @note This function also enables the interrupt in the NVIC (EnableIRQ() is called internally).
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*
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* @param interrupt The IRQ number.
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*/
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void EnableDeepSleepIRQ(IRQn_Type interrupt);
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/*!
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* @brief Disable specific interrupt for wake-up from deep-sleep mode.
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*
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* Disable the interrupt for wake-up from deep sleep mode.
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* Some interrupts are typically used in sleep mode only and will not occur during
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* deep-sleep mode because relevant clocks are stopped. However, it is possible to enable
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* those clocks (significantly increasing power consumption in the reduced power mode),
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* making these wake-ups possible.
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*
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* @note This function also disables the interrupt in the NVIC (DisableIRQ() is called internally).
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*
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* @param interrupt The IRQ number.
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*/
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void DisableDeepSleepIRQ(IRQn_Type interrupt);
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#endif /* FSL_FEATURE_SOC_SYSCON_COUNT */
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#if defined(__cplusplus)
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}
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#endif
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/*! @} */
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#endif /* _FSL_COMMON_H_ */
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