zephyr/arch
Daniel Leung 7bb5015ced tests: benchmarks: use high-res counter for MEC1501 SoC
The timer counter for ticks on MEC1501 SoC is based on the RTOS
timer which runs at 32kHz. This is too slow for timing benchmarks
as most cases can be finished within one or two ticks. Since
the SoC has higher frequency timers running at 48MHz, add
the necessary bits to use these for timing benchmarks.

Fix #23414

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-03-31 19:52:21 -04:00
..
arc
arm arm: AArch64: Add support for nested exception handlers 2020-03-31 19:24:48 +02:00
common tests: benchmarks: use high-res counter for MEC1501 SoC 2020-03-31 19:52:21 -04:00
nios2
posix
riscv
x86
xtensa
CMakeLists.txt
Kconfig