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https://github.com/zephyrproject-rtos/zephyr
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cc69d373d1
This patch reworks the current ARM __swap() function into a C function. Due to some issues with using svc calls withing fault handlers, we needed to change the way we initiate a swap by removing the dependence on svc #0. Before __swap() is called, the system has already done an irq_lock(). Upon return from __swap(), the equivalent of an irq_lock() is done due to restoration of the key value from the irq_lock preceeding the call. For ARM V6M (M0/M0+), the pendsv bit is toggled and the irqs are enabled. There is no priority masking in v6m, so it's just a global enable. For ARM V7M, the priority mask has to be set to 0x0 to allow for the pendsv IRQ to be taken. This is done for both via a call to irq_unlock(0). After this unlock, a pendsv irq will be taken, either at the tail end of the current irq handling if we are in handler mode, or immediately due to the pendsv being asserted (no other outstanding irqs). The next thread will be scheduled. Upon return from the context switch to the original thread, the priority mask will already be correct due to the pendsv processing. Signed-off-by: Andy Gross <andy.gross@linaro.org>
70 lines
2.2 KiB
C
70 lines
2.2 KiB
C
/*
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* Copyright (c) 2018 Linaro, Limited
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <kernel.h>
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#include <toolchain.h>
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#include <kernel_structs.h>
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#ifdef CONFIG_EXECUTION_BENCHMARKING
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extern void read_timer_start_of_swap(void);
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#endif
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extern const int _k_neg_eagain;
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/**
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*
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* @brief Initiate a cooperative context switch
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*
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* The __swap() routine is invoked by various kernel services to effect
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* a cooperative context context switch. Prior to invoking __swap(), the caller
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* disables interrupts via irq_lock() and the return 'key' is passed as a
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* parameter to __swap(). The 'key' actually represents the BASEPRI register
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* prior to disabling interrupts via the BASEPRI mechanism.
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*
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* __swap() itself does not do much.
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*
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* It simply stores the intlock key (the BASEPRI value) parameter into
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* current->basepri, and then triggers a PendSV exception, which does
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* the heavy lifting of context switching.
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* This is the only place we have to save BASEPRI since the other paths to
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* __pendsv all come from handling an interrupt, which means we know the
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* interrupts were not locked: in that case the BASEPRI value is 0.
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*
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* Given that __swap() is called to effect a cooperative context switch,
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* only the caller-saved integer registers need to be saved in the thread of the
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* outgoing thread. This is all performed by the hardware, which stores it in
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* its exception stack frame, created when handling the svc exception.
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*
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* On ARMv6-M, the intlock key is represented by the PRIMASK register,
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* as BASEPRI is not available.
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*
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* @return may contain a return value setup by a call to
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* _set_thread_return_value()
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*
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*/
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unsigned int __swap(int key)
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{
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#ifdef CONFIG_USERSPACE
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/* Save off current privilege mode */
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_current->arch.mode = __get_CONTROL() & CONTROL_nPRIV_Msk;
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#endif
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#ifdef CONFIG_EXECUTION_BENCHMARKING
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read_timer_start_of_swap();
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#endif
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/* store off key and return value */
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_current->arch.basepri = key;
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_current->arch.swap_return_value = _k_neg_eagain;
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/* set pending bit to make sure we will take a PendSV exception */
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SCB->ICSR |= SCB_ICSR_PENDSVSET_Msk;
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/* clear mask or enable all irqs to take a pendsv */
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irq_unlock(0);
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return _current->arch.swap_return_value;
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}
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