mirror of
https://github.com/zephyrproject-rtos/zephyr
synced 2025-09-11 20:53:52 +00:00
This moves the baud rate and options fields out of the UART driver config struct and into the driver data struct. This will allow changing baud rate and options at runtime in the future. Change-Id: I62ddea2f95e634f2d60eeb9537f960799fc9301f Signed-off-by: Daniel Leung <daniel.leung@intel.com>
677 lines
17 KiB
C
677 lines
17 KiB
C
/* stellarisUartDrv.c - Stellaris UART driver */
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/*
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* Copyright (c) 2013-2015 Wind River Systems, Inc.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/**
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* @brief Driver for Stellaris UART
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*
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* Driver for Stellaris UART found namely on TI LM3S6965 board. It is similar to
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* an 16550 in functionality, but is not register-compatible.
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*
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* There is only support for poll-mode, so it can only be used with the printk
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* and STDOUT_CONSOLE APIs.
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*/
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#include <nanokernel.h>
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#include <arch/cpu.h>
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#include <misc/__assert.h>
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#include <board.h>
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#include <init.h>
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#include <uart.h>
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#include <sections.h>
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/* definitions */
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/* Stellaris UART module */
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struct _uart {
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uint32_t dr;
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union {
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uint32_t _sr;
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uint32_t _cr;
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} u1;
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uint8_t _res1[0x010];
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uint32_t fr;
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uint8_t _res2[0x04];
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uint32_t ilpr;
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uint32_t ibrd;
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uint32_t fbrd;
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uint32_t lcrh;
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uint32_t ctl;
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uint32_t ifls;
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uint32_t im;
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uint32_t ris;
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uint32_t mis;
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uint32_t icr;
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uint8_t _res3[0xf8c];
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uint32_t peripd_id4;
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uint32_t peripd_id5;
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uint32_t peripd_id6;
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uint32_t peripd_id7;
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uint32_t peripd_id0;
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uint32_t peripd_id1;
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uint32_t peripd_id2;
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uint32_t peripd_id3;
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uint32_t p_cell_id0;
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uint32_t p_cell_id1;
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uint32_t p_cell_id2;
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uint32_t p_cell_id3;
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};
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/* Device data structure */
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struct uart_stellaris_dev_data_t {
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uint32_t baud_rate; /* Baud rate */
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};
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/* convenience defines */
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#define DEV_CFG(dev) \
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((struct uart_device_config * const)(dev)->config->config_info)
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#define DEV_DATA(dev) \
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((struct uart_stellaris_dev_data_t * const)(dev)->driver_data)
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#define UART_STRUCT(dev) \
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((volatile struct _uart *)(DEV_CFG(dev))->base)
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/* registers */
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#define UARTDR(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0x000)))
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#define UARTSR(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0x004)))
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#define UARTCR(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0x004)))
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#define UARTFR(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0x018)))
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#define UARTILPR(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0x020)))
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#define UARTIBRD(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0x024)))
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#define UARTFBRD(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0x028)))
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#define UARTLCRH(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0x02C)))
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#define UARTCTL(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0x030)))
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#define UARTIFLS(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0x034)))
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#define UARTIM(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0x038)))
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#define UARTRIS(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0x03C)))
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#define UARTMIS(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0x040)))
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#define UARTICR(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0x044)))
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/* ID registers: UARTPID = UARTPeriphID, UARTPCID = UARTPCellId */
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#define UARTPID4(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0xFD0)))
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#define UARTPID5(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0xFD4)))
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#define UARTPID6(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0xFD8)))
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#define UARTPID7(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0xFDC)))
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#define UARTPID0(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0xFE0)))
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#define UARTPID1(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0xFE4)))
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#define UARTPID2(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0xFE8)))
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#define UARTPID3(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0xFEC)))
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#define UARTPCID0(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0xFF0)))
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#define UARTPCID1(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0xFF4)))
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#define UARTPCID2(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0xFF8)))
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#define UARTPCID3(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0xFFC)))
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/* muxed UART registers */
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#define sr u1._sr /* Read: receive status */
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#define cr u1._cr /* Write: receive error clear */
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/* bits */
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#define UARTFR_BUSY 0x00000008
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#define UARTFR_RXFE 0x00000010
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#define UARTFR_TXFF 0x00000020
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#define UARTFR_RXFF 0x00000040
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#define UARTFR_TXFE 0x00000080
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#define UARTLCRH_FEN 0x00000010
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#define UARTLCRH_WLEN 0x00000060
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#define UARTCTL_UARTEN 0x00000001
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#define UARTCTL_LBE 0x00000800
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#define UARTCTL_TXEN 0x00000100
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#define UARTCTL_RXEN 0x00000200
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#define UARTTIM_RXIM 0x00000010
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#define UARTTIM_TXIM 0x00000020
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#define UARTTIM_RTIM 0x00000040
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#define UARTTIM_FEIM 0x00000080
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#define UARTTIM_PEIM 0x00000100
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#define UARTTIM_BEIM 0x00000200
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#define UARTTIM_OEIM 0x00000400
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#define UARTMIS_RXMIS 0x00000010
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#define UARTMIS_TXMIS 0x00000020
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static struct uart_driver_api uart_stellaris_driver_api;
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/**
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* @brief Set the baud rate
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*
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* This routine set the given baud rate for the UART.
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*
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* @param dev UART device struct (of type struct uart_device_config)
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* @param baudrate Baud rate
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* @param sys_clk_freq_hz System clock frequency in Hz
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*
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* @return N/A
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*/
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static void baudrate_set(struct device *dev,
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uint32_t baudrate, uint32_t sys_clk_freq_hz)
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{
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volatile struct _uart *uart = UART_STRUCT(dev);
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uint32_t brdi, brdf, div, rem;
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/* upon reset, the system clock uses the intenal OSC @ 12MHz */
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div = (16 * baudrate);
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rem = sys_clk_freq_hz % div;
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/*
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* floating part of baud rate (LM3S6965 p.433), equivalent to
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* [float part of (SYSCLK / div)] * 64 + 0.5
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*/
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brdf = ((((rem * 64) << 1) / div) + 1) >> 1;
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/* integer part of baud rate (LM3S6965 p.433) */
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brdi = sys_clk_freq_hz / div;
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/*
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* those registers are 32-bit, but the reserved bits should be
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* preserved
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*/
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uart->ibrd = (uint16_t)(brdi & 0xffff); /* 16 bits */
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uart->fbrd = (uint8_t)(brdf & 0x3f); /* 6 bits */
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}
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/**
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* @brief Enable the UART
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*
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* This routine enables the given UART.
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*
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* @param dev UART device struct (of type struct uart_device_config)
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*
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* @return N/A
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*/
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static inline void enable(struct device *dev)
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{
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volatile struct _uart *uart = UART_STRUCT(dev);
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uart->ctl |= UARTCTL_UARTEN;
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}
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/**
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* @brief Disable the UART
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*
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* This routine disables the given UART.
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*
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* @param dev UART device struct (of type struct uart_device_config)
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*
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* @return N/A
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*/
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static inline void disable(struct device *dev)
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{
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volatile struct _uart *uart = UART_STRUCT(dev);
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uart->ctl &= ~UARTCTL_UARTEN;
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/* ensure transmissions are complete */
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while (uart->fr & UARTFR_BUSY)
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;
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/* flush the FIFOs by disabling them */
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uart->lcrh &= ~UARTLCRH_FEN;
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}
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/*
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* no stick parity
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* 8-bit frame
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* FIFOs disabled
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* one stop bit
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* parity disabled
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* send break off
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*/
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#define LINE_CONTROL_DEFAULTS UARTLCRH_WLEN
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/**
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* @brief Set the default UART line controls
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*
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* This routine sets the given UART's line controls to their default settings.
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*
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* @param dev UART device struct (of type struct uart_device_config)
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*
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* @return N/A
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*/
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static inline void line_control_defaults_set(struct device *dev)
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{
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volatile struct _uart *uart = UART_STRUCT(dev);
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uart->lcrh = LINE_CONTROL_DEFAULTS;
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}
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/**
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* @brief Initialize UART channel
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*
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* This routine is called to reset the chip in a quiescent state.
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* It is assumed that this function is called only once per UART.
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*
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* @param dev UART device struct (of type struct uart_device_config)
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*
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* @return DEV_OK
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*/
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static int uart_stellaris_init(struct device *dev)
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{
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disable(dev);
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baudrate_set(dev, DEV_DATA(dev)->baud_rate,
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DEV_CFG(dev)->sys_clk_freq);
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line_control_defaults_set(dev);
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enable(dev);
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dev->driver_api = &uart_stellaris_driver_api;
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return DEV_OK;
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}
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/**
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* @brief Get the UART transmit ready status
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*
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* This routine returns the given UART's transmit ready status.
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*
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* @param dev UART device struct (of type struct uart_device_config)
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*
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* @return 0 if ready to transmit, 1 otherwise
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*/
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static int poll_tx_ready(struct device *dev)
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{
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volatile struct _uart *uart = UART_STRUCT(dev);
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return (uart->fr & UARTFR_TXFE);
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}
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/**
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* @brief Poll the device for input.
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*
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* @param dev UART device struct (of type struct uart_device_config)
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* @param c Pointer to character
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*
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* @return 0 if a character arrived, -1 if the input buffer if empty.
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*/
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static int uart_stellaris_poll_in(struct device *dev, unsigned char *c)
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{
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volatile struct _uart *uart = UART_STRUCT(dev);
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if (uart->fr & UARTFR_RXFE)
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return (-1);
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/* got a character */
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*c = (unsigned char)uart->dr;
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return 0;
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}
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/**
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* @brief Output a character in polled mode.
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*
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* Checks if the transmitter is empty. If empty, a character is written to
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* the data register.
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*
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* @param dev UART device struct (of type struct uart_device_config)
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* @param c Character to send
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*
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* @return Sent character
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*/
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static unsigned char uart_stellaris_poll_out(struct device *dev,
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unsigned char c)
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{
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volatile struct _uart *uart = UART_STRUCT(dev);
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while (!poll_tx_ready(dev))
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;
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/* send a character */
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uart->dr = (uint32_t)c;
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return c;
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}
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#if CONFIG_UART_INTERRUPT_DRIVEN
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/**
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* @brief Fill FIFO with data
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*
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* @param dev UART device struct (of type struct uart_device_config)
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* @param tx_data Data to transmit
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* @param len Number of bytes to send
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*
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* @return Number of bytes sent
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*/
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static int uart_stellaris_fifo_fill(struct device *dev, const uint8_t *tx_data,
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int len)
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{
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volatile struct _uart *uart = UART_STRUCT(dev);
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uint8_t num_tx = 0;
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while ((len - num_tx > 0) && ((uart->fr & UARTFR_TXFF) == 0)) {
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uart->dr = (uint32_t)tx_data[num_tx++];
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}
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return (int)num_tx;
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}
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/**
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* @brief Read data from FIFO
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*
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* @param dev UART device struct (of type struct uart_device_config)
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* @param rx_data Pointer to data container
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* @param size Container size
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*
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* @return Number of bytes read
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*/
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static int uart_stellaris_fifo_read(struct device *dev, uint8_t *rx_data,
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const int size)
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{
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volatile struct _uart *uart = UART_STRUCT(dev);
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uint8_t num_rx = 0;
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while ((size - num_rx > 0) && ((uart->fr & UARTFR_RXFE) == 0)) {
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rx_data[num_rx++] = (uint8_t)uart->dr;
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}
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return num_rx;
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}
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/**
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* @brief Enable TX interrupt
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*
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* @param dev UART device struct (of type struct uart_device_config)
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*
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* @return N/A
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*/
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static void uart_stellaris_irq_tx_enable(struct device *dev)
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{
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static uint8_t first_time =
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1; /* used to allow the first transmission */
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uint32_t saved_ctl; /* saved UARTCTL (control) register */
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uint32_t saved_ibrd; /* saved UARTIBRD (integer baud rate) register */
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uint32_t saved_fbrd; /* saved UARTFBRD (fractional baud rate) register
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*/
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volatile struct _uart *uart = UART_STRUCT(dev);
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if (first_time) {
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/*
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* The Tx interrupt will not be set when transmission is first
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* enabled.
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* A character has to be transmitted before Tx interrupts will
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* work,
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* so send one via loopback mode.
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*/
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first_time = 0;
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/* save current control and baud rate settings */
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saved_ctl = uart->ctl;
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saved_ibrd = uart->ibrd;
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saved_fbrd = uart->fbrd;
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/* send a character with default settings via loopback */
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disable(dev);
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uart->fbrd = 0;
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uart->ibrd = 1;
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uart->lcrh = 0;
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uart->ctl = (UARTCTL_UARTEN | UARTCTL_TXEN | UARTCTL_LBE);
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uart->dr = 0;
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while (uart->fr & UARTFR_BUSY)
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;
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/* restore control and baud rate settings */
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disable(dev);
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uart->ibrd = saved_ibrd;
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uart->fbrd = saved_fbrd;
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line_control_defaults_set(dev);
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uart->ctl = saved_ctl;
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}
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uart->im |= UARTTIM_TXIM;
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}
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/**
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* @brief Disable TX interrupt in IER
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*
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* @param dev UART device struct (of type struct uart_device_config)
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*
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* @return N/A
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*/
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static void uart_stellaris_irq_tx_disable(struct device *dev)
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{
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volatile struct _uart *uart = UART_STRUCT(dev);
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uart->im &= ~UARTTIM_TXIM;
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}
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/**
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* @brief Check if Tx IRQ has been raised
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*
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* @param dev UART device struct (of type struct uart_device_config)
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*
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* @return 1 if a Tx IRQ is pending, 0 otherwise
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*/
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static int uart_stellaris_irq_tx_ready(struct device *dev)
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{
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volatile struct _uart *uart = UART_STRUCT(dev);
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return ((uart->mis & UARTMIS_TXMIS) == UARTMIS_TXMIS);
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}
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/**
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* @brief Enable RX interrupt in IER
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*
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* @param dev UART device struct (of type struct uart_device_config)
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*
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* @return N/A
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*/
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static void uart_stellaris_irq_rx_enable(struct device *dev)
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{
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volatile struct _uart *uart = UART_STRUCT(dev);
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uart->im |= UARTTIM_RXIM;
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}
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/**
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* @brief Disable RX interrupt in IER
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*
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* @param dev UART device struct (of type struct uart_device_config)
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*
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* @return N/A
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*/
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static void uart_stellaris_irq_rx_disable(struct device *dev)
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{
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volatile struct _uart *uart = UART_STRUCT(dev);
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uart->im &= ~UARTTIM_RXIM;
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}
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/**
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* @brief Check if Rx IRQ has been raised
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*
|
|
* @param dev UART device struct (of type struct uart_device_config)
|
|
*
|
|
* @return 1 if an IRQ is ready, 0 otherwise
|
|
*/
|
|
static int uart_stellaris_irq_rx_ready(struct device *dev)
|
|
{
|
|
volatile struct _uart *uart = UART_STRUCT(dev);
|
|
|
|
return ((uart->mis & UARTMIS_RXMIS) == UARTMIS_RXMIS);
|
|
}
|
|
|
|
/**
|
|
* @brief Enable error interrupts
|
|
*
|
|
* @param dev UART device struct (of type struct uart_device_config)
|
|
*
|
|
* @return N/A
|
|
*/
|
|
static void uart_stellaris_irq_err_enable(struct device *dev)
|
|
{
|
|
volatile struct _uart *uart = UART_STRUCT(dev);
|
|
|
|
uart->im |= (UARTTIM_RTIM | UARTTIM_FEIM | UARTTIM_PEIM |
|
|
UARTTIM_BEIM | UARTTIM_OEIM);
|
|
}
|
|
|
|
/**
|
|
* @brief Disable error interrupts
|
|
*
|
|
* @param dev UART device struct (of type struct uart_device_config)
|
|
*
|
|
* @return N/A
|
|
*/
|
|
static void uart_stellaris_irq_err_disable(struct device *dev)
|
|
{
|
|
volatile struct _uart *uart = UART_STRUCT(dev);
|
|
|
|
uart->im &= ~(UARTTIM_RTIM | UARTTIM_FEIM | UARTTIM_PEIM |
|
|
UARTTIM_BEIM | UARTTIM_OEIM);
|
|
}
|
|
|
|
/**
|
|
* @brief Check if Tx or Rx IRQ is pending
|
|
*
|
|
* @param dev UART device struct (of type struct uart_device_config)
|
|
*
|
|
* @return 1 if a Tx or Rx IRQ is pending, 0 otherwise
|
|
*/
|
|
static int uart_stellaris_irq_is_pending(struct device *dev)
|
|
{
|
|
volatile struct _uart *uart = UART_STRUCT(dev);
|
|
|
|
/* Look only at Tx and Rx data interrupt flags */
|
|
return ((uart->mis & (UARTMIS_RXMIS | UARTMIS_TXMIS)) ? 1 : 0);
|
|
}
|
|
|
|
/**
|
|
* @brief Update IRQ status
|
|
*
|
|
* @param dev UART device struct (of type struct uart_device_config)
|
|
*
|
|
* @return Always 1
|
|
*/
|
|
static int uart_stellaris_irq_update(struct device *dev)
|
|
{
|
|
return 1;
|
|
}
|
|
|
|
/**
|
|
* @brief Returns UART interrupt number
|
|
*
|
|
* Returns the IRQ number used by the specified UART port
|
|
*
|
|
* @param dev UART device struct (of type struct uart_device_config)
|
|
*
|
|
* @return IRQ number
|
|
*/
|
|
static unsigned int uart_stellaris_irq_get(struct device *dev)
|
|
{
|
|
return (unsigned int)DEV_CFG(dev)->irq;
|
|
}
|
|
|
|
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
|
|
|
|
|
|
static struct uart_driver_api uart_stellaris_driver_api = {
|
|
.poll_in = uart_stellaris_poll_in,
|
|
.poll_out = uart_stellaris_poll_out,
|
|
|
|
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
|
|
|
|
.fifo_fill = uart_stellaris_fifo_fill,
|
|
.fifo_read = uart_stellaris_fifo_read,
|
|
.irq_tx_enable = uart_stellaris_irq_tx_enable,
|
|
.irq_tx_disable = uart_stellaris_irq_tx_disable,
|
|
.irq_tx_ready = uart_stellaris_irq_tx_ready,
|
|
.irq_rx_enable = uart_stellaris_irq_rx_enable,
|
|
.irq_rx_disable = uart_stellaris_irq_rx_disable,
|
|
.irq_rx_ready = uart_stellaris_irq_rx_ready,
|
|
.irq_err_enable = uart_stellaris_irq_err_enable,
|
|
.irq_err_disable = uart_stellaris_irq_err_disable,
|
|
.irq_is_pending = uart_stellaris_irq_is_pending,
|
|
.irq_update = uart_stellaris_irq_update,
|
|
.irq_get = uart_stellaris_irq_get,
|
|
|
|
#endif
|
|
};
|
|
|
|
|
|
#ifdef CONFIG_UART_STELLARIS_PORT_0
|
|
|
|
static struct uart_device_config uart_stellaris_dev_cfg_0 = {
|
|
.base = (uint8_t *)CONFIG_UART_STELLARIS_PORT_0_BASE_ADDR,
|
|
.irq = CONFIG_UART_STELLARIS_PORT_0_IRQ,
|
|
|
|
.sys_clk_freq = CONFIG_UART_STELLARIS_PORT_0_CLK_FREQ,
|
|
};
|
|
|
|
static struct uart_stellaris_dev_data_t uart_stellaris_dev_data_0 = {
|
|
.baud_rate = CONFIG_UART_STELLARIS_PORT_0_BAUD_RATE,
|
|
};
|
|
|
|
DECLARE_DEVICE_INIT_CONFIG(uart_stellaris0,
|
|
CONFIG_UART_STELLARIS_PORT_0_NAME,
|
|
&uart_stellaris_init,
|
|
&uart_stellaris_dev_cfg_0);
|
|
|
|
SYS_DEFINE_DEVICE(uart_stellaris0, &uart_stellaris_dev_data_0, PRIMARY,
|
|
CONFIG_KERNEL_INIT_PRIORITY_DEVICE);
|
|
|
|
#endif /* CONFIG_UART_STELLARIS_PORT_0 */
|
|
|
|
#ifdef CONFIG_UART_STELLARIS_PORT_1
|
|
|
|
static struct uart_device_config uart_stellaris_dev_cfg_1 = {
|
|
.base = (uint8_t *)CONFIG_UART_STELLARIS_PORT_1_BASE_ADDR,
|
|
.irq = CONFIG_UART_STELLARIS_PORT_1_IRQ,
|
|
|
|
.sys_clk_freq = CONFIG_UART_STELLARIS_PORT_1_CLK_FREQ,
|
|
};
|
|
|
|
static struct uart_stellaris_dev_data_t uart_stellaris_dev_data_1 = {
|
|
.baud_rate = CONFIG_UART_STELLARIS_PORT_1_BAUD_RATE,
|
|
};
|
|
|
|
DECLARE_DEVICE_INIT_CONFIG(uart_stellaris1,
|
|
CONFIG_UART_STELLARIS_PORT_1_NAME,
|
|
&uart_stellaris_init,
|
|
&uart_stellaris_dev_cfg_1);
|
|
|
|
SYS_DEFINE_DEVICE(uart_stellaris1, &uart_stellaris_dev_data_1, PRIMARY,
|
|
CONFIG_KERNEL_INIT_PRIORITY_DEVICE);
|
|
|
|
#endif /* CONFIG_UART_STELLARIS_PORT_1 */
|
|
|
|
#ifdef CONFIG_UART_STELLARIS_PORT_2
|
|
|
|
static struct uart_device_config uart_stellaris_dev_cfg_2 = {
|
|
.base = (uint8_t *)CONFIG_UART_STELLARIS_PORT_2_BASE_ADDR,
|
|
.irq = CONFIG_UART_STELLARIS_PORT_2_IRQ,
|
|
|
|
.sys_clk_freq = CONFIG_UART_STELLARIS_PORT_2_CLK_FREQ,
|
|
};
|
|
|
|
static struct uart_stellaris_dev_data_t uart_stellaris_dev_data_2 = {
|
|
.baud_rate = CONFIG_UART_STELLARIS_PORT_2_BAUD_RATE,
|
|
};
|
|
|
|
DECLARE_DEVICE_INIT_CONFIG(uart_stellaris2,
|
|
CONFIG_UART_STELLARIS_PORT_2_NAME,
|
|
&uart_stellaris_init,
|
|
&uart_stellaris_dev_cfg_2);
|
|
|
|
SYS_DEFINE_DEVICE(uart_stellaris2, &uart_stellaris_dev_data_2, PRIMARY,
|
|
CONFIG_KERNEL_INIT_PRIORITY_DEVICE);
|
|
|
|
#endif /* CONFIG_UART_STELLARIS_PORT_2 */
|