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for smp target, there is a case where just one core is running, then: * during init, the master core will run, others cores will halt/sleep * use timer driver for single core Signed-off-by: Wayne Ren <wei.ren@synopsys.com> |
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.. | ||
altera_avalon_timer_hal.c | ||
apic_timer.c | ||
arcv2_timer0.c | ||
arm_arch_timer.c | ||
cc13x2_cc26x2_rtc_timer.c | ||
CMakeLists.txt | ||
cortex_m_systick.c | ||
hpet.c | ||
Kconfig | ||
Kconfig.stm32_lptim | ||
legacy_api.h | ||
litex_timer.c | ||
loapic_timer.c | ||
mchp_xec_rtos_timer.c | ||
native_posix_timer.c | ||
nrf_rtc_timer.c | ||
riscv_machine_timer.c | ||
rv32m1_lptmr_timer.c | ||
sam0_rtc_timer.c | ||
stm32_lptim_timer.c | ||
sys_clock_init.c | ||
xlnx_psttc_timer.c | ||
xtensa_sys_timer.c |