Peter Bigot d28e65a784 drivers/timer/nrf_rtc_timer: clarify intent of ZLI compensation ... The variable enabling entry to the zero latency interrupt compensation loop was named generically, and its logic inverted, making the code difficult to understand. Change the name and initial value to more clearly indicate its role. Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>		2019-08-20 08:34:15 +02:00
..
altera_avalon_timer_hal.c
apic_timer.c
arcv2_timer0.c	arch: arc: add initial support of ARC TEE	2019-08-10 17:45:22 +02:00
CMakeLists.txt	timer: Add Xilinx ZynqMP PS ttc timer	2019-08-09 22:50:50 +02:00
cortex_m_systick.c
hpet.c
Kconfig	timer: Add Xilinx ZynqMP PS ttc timer	2019-08-09 22:50:50 +02:00
legacy_api.h
litex_timer.c
loapic_timer.c
mchp_xec_rtos_timer.c
native_posix_timer.c
nrf_rtc_timer.c	drivers/timer/nrf_rtc_timer: clarify intent of ZLI compensation	2019-08-20 08:34:15 +02:00
riscv_machine_timer.c
rv32m1_lptmr_timer.c
sam0_rtc_timer.c
sys_clock_init.c
xlnx_psttc_timer.c	timer: Add Xilinx ZynqMP PS ttc timer	2019-08-09 22:50:50 +02:00
xtensa_sys_timer.c