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d314253fbb
zephyr/soc
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Stephanos Ioannidis d314253fbb soc: arm: xilinx_zynqmp: Relocate platform-specific initialisation. 
This commit relocates the exception vector table address range
configuration routine that was previously implemented as part of
Cortex-R architecture reset function to SoC platform-specific
initialisation routine.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-01-10 10:34:17 +01:00
..
arc global: Remove leading/trailing blank lines in files 2019-12-11 19:17:27 +01:00
arm soc: arm: xilinx_zynqmp: Relocate platform-specific initialisation. 2020-01-10 10:34:17 +01:00
nios2 global: Remove leading/trailing blank lines in files 2019-12-11 19:17:27 +01:00
posix
riscv devicetree: Remove DT_SRAM_{BASE_ADDRESS,SIZE}, use CONFIG_* versions 2020-01-07 17:19:36 +01:00
x86 soc: x86: apollo_lake: Turn .rst doc into .txt 2019-12-06 16:56:24 +01:00
xtensa devicetree: Remove DT_SRAM_{BASE_ADDRESS,SIZE}, use CONFIG_* versions 2020-01-07 17:19:36 +01:00
Kconfig