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3f07d70cf3
Add an interrupt controller driver for this device. This is an extremely simple second level controller with per-interrupt-bit registers for "enable" and "status". There is no internal latching, so no "clear/ACK" process is needed. Signed-off-by: Andy Ross <andyross@google.com>
10 lines
308 B
Plaintext
10 lines
308 B
Plaintext
# Copyright 2023 The ChromiumOS Authors
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# SPDX-License-Identifier: Apache-2.0
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config INTC_MTK_ADSP
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bool "MediaTek Audio DSP Interrupt Controller"
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help
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Very simple cascaded interrupt controller consisting of two
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bitfield registers (status and enable) and one mask value
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defining valid interrupts.
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