zephyr/arch/x86
Andrew Boie 83aedb2377 x86: increment default page pool pages
With the current identity mapping scheme a new test requires
some more memory to be set aside here.

In production this parameter gets turned per-board, and
the pending paging code overhaul in #27001 significantly
relaxes this as driver I/O mappings are no longer sparse.

Fixes a runtime failure in tests/kernel/device on
qemu_x86_64 that somehow slipped past CI.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-08-12 16:13:19 -05:00
..
core
include
zefi
CMakeLists.txt
gen_gdt.py
gen_idt.py
ia32.cmake
intel64.cmake
Kconfig