mirror of
https://github.com/zephyrproject-rtos/zephyr
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c107714214
TSIM3 is a LEON processor and system simulator. This commit allows using TSIM sanitycheck and the make run target. TSIM parameters can be further specified in the board configuration using TSIM and TSIM_SYS. Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
58 lines
1.1 KiB
YAML
58 lines
1.1 KiB
YAML
#
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# Schema to validate a YAML file describing a Zephyr test platform
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#
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# We load this with pykwalify
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# (http://pykwalify.readthedocs.io/en/unstable/validation-rules.html),
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# a YAML structure validator, to validate the YAML files that describe
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# Zephyr test platforms
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#
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# The original spec comes from Zephyr's sanitycheck script
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#
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type: map
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mapping:
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"identifier":
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type: str
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"name":
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type: str
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"type":
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type: str
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enum: ["mcu", "qemu", "sim", "unit", "native"]
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"simulation":
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type: str
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enum: ["qemu", "simics", "xt-sim", "renode", "nsim", "mdb-nsim", "tsim"]
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"arch":
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type: str
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"toolchain":
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type: seq
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seq:
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- type: str
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"env":
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type: seq
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seq:
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- type: str
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"ram":
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type: int
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"flash":
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type: int
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"sanitycheck":
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type: bool
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"supported":
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type: seq
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seq:
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- type: str
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"testing":
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type: map
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mapping:
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"default":
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type: bool
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"only_tags":
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type: seq
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seq:
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-
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type: str
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"ignore_tags":
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type: seq
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seq:
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- type: str
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