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9e4dfd8f4e
There are x86 platforms where the IRQ configuration register for PCIe is not pre-populated and the OS needs to assign a number dynamically by writing to the register. In order to allocate interrupts we have to know which ones have been hard-coded in device tree. We accomplish this by collecting these values through the IRQ_CONNECT() macro and placing them in a dedicated linker section (in ROM). The full set of allocated interrupts are managed through a bitmap, and the pre-allocated values (from the linker section) are inserted into this upon initial runtime access. This patch introduces a new pcie_alloc_irq() API that drivers can use to allocate interrupt line numbers. The two in-tree drivers that were using this API (I2C and UART) are converted to use the new API. Signed-off-by: Johan Hedberg <johan.hedberg@intel.com> |
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| .. | ||
| ia32 | ||
| intel64 | ||
| acpi.h | ||
| arch_inlines.h | ||
| arch.h | ||
| memmap.h | ||
| memory.ld | ||
| mmustructs.h | ||
| msr.h | ||
| multiboot.h | ||
| pagetables.ld | ||
| thread_stack.h | ||