mirror of
https://github.com/zephyrproject-rtos/zephyr
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ed6c0103a9
This commit adds LiteX SoC Builder clock control driver for MMCM module. It gives ability to change frequency, phase and duty cycle on up to 7 clock outputs. Signed-off-by: Pawel Czarnecki <pczarnecki@internships.antmicro.com> Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
50 lines
1.0 KiB
C
50 lines
1.0 KiB
C
/*
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* Copyright (c) 2020 Antmicro <www.antmicro.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief LiteX Clock Control driver interface
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*/
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#ifndef CLK_CTRL_LITEX_H
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#define CLK_CTRL_LITEX_H
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/**
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* @brief LiteX Clock Control driver interface
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* @defgroup clock_control_litex_interface LiteX Clock Control driver interface
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* @brief LiteX Clock Control driver interface
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* @ingroup clock_control_interface
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* @{
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*/
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#include <zephyr/types.h>
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#define MMCM DT_NODELABEL(clock0)
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#define MMCM_NAME DT_PROP(DT_NODELABEL(clock0), label)
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#define NCLKOUT DT_PROP_LEN(MMCM, clock_output_names)
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/**
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* @brief Structure for interfacing with clock control API
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*
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* @param clkout_nr Number of clock output to be changed
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* @param rate Frequency to set given in Hz
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* @param phase Phase offset in degrees
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* @param duty Duty cycle of clock signal in percent
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*
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*/
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struct litex_clk_setup {
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uint8_t clkout_nr;
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uint32_t rate;
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uint16_t phase;
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uint8_t duty;
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};
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/**
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* @}
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*/
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#endif /* CLK_CTRL_LITEX_H */
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