mirror of
https://github.com/zephyrproject-rtos/zephyr
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d2818c4d49
Add new driver for the Cirrus CS43L22 audio DAC. Signed-off-by: Titouan Christophe <moiandme@gmail.com>
312 lines
7.9 KiB
C
312 lines
7.9 KiB
C
/*
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* Copyright (c) 2025 Titouan Christophe
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/drivers/gpio.h>
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#include <zephyr/drivers/i2c.h>
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#include <zephyr/audio/codec.h>
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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER(cirrus_cs43l22);
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#define DT_DRV_COMPAT cirrus_cs43l22
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/*
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* See datasheet: https://statics.cirrus.com/pubs/proDatasheet/CS43L22_F2.pdf
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*/
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/* (datasheet) 6. REGISTER QUICK REFERENCE */
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#define REG_ID 0x01
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#define REG_POWER_CTL_1 0x02
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#define REG_POWER_CTL_2 0x04
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#define REG_CLOCKING_CTL 0x05
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#define REG_INTERFACE_CTL_1 0x06
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#define REG_INTERFACE_CTL_2 0x07
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#define REG_PASSTHROUGH_A 0x08
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#define REG_PASSTHROUGH_B 0x09
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#define REG_ANALOG_ZC_AND_SR 0x0a
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#define REG_PASSTHROUGH_GANG_CONTROL 0x0c
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#define REG_PLAYBACK_CTL_1 0x0d
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#define REG_MISC_CTL 0x0e
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#define REG_PLAYBACK_CTL_2 0x0f
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#define REG_PASSTHROUGH_A_VOL 0x14
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#define REG_PASSTHROUGH_B_VOL 0x15
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#define REG_PCMA_VOL 0x1a
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#define REG_PCMB_VOL 0x1b
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#define REG_BEEP_FREQ 0x1c
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#define REG_BEEP_VOL 0x1d
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#define REG_BEEP_TONE 0x1e
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#define REG_TONE_CTL 0x1f
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#define REG_MASTER_A_VOL 0x20
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#define REG_MASTER_B_VOL 0x21
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#define REG_HEADPHONES_A_VOL 0x22
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#define REG_HEADPHONES_B_VOL 0x23
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#define REG_SPEAKER_A_VOL 0x22
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#define REG_SPEAKER_B_VOL 0x23
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#define REG_LIMITER_CTL_1 0x27
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#define REG_LIMITER_CTL_2 0x28
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#define REG_STATUS 0x2e
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#define REG_SPEAKER_STATUS 0x31
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/* (datasheet) 7.5.4 DAC Interface Format */
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#define DAC_IF_FORMAT_LEFT_JUSTIFIED 0
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#define DAC_IF_FORMAT_I2S 1
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#define DAC_IF_FORMAT_RIGHT_JUSTIFIED 2
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/* (datasheet) 7.5.5 Audio Word Length */
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#define WORDLEN_32 0
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#define WORDLEN_24 1
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#define WORDLEN_20 2
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#define WORDLEN_16 3
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#define WORDLEN_RIGHT_24 0
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#define WORDLEN_RIGHT_20 1
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#define WORDLEN_RIGHT_18 2
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#define WORDLEN_RIGHT_16 3
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/* (datasheet) 7.12 Playback Control 2 */
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#define HEADPHONES_B_MUTE (1 << 7)
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#define HEADPHONES_A_MUTE (1 << 6)
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#define SPEAKER_B_MUTE (1 << 5)
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#define SPEAKER_A_MUTE (1 << 4)
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#define cs43l22_write(_i2c, _reg, _value) \
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cs43l22_write_masked(_i2c, _reg, _value, 0xff)
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static inline int cs43l22_write_masked(const struct i2c_dt_spec *i2c, uint8_t reg,
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uint8_t value, uint8_t mask)
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{
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int ret;
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uint8_t actual_value = 0;
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if (mask != 0xff) {
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ret = i2c_burst_read_dt(i2c, reg, &actual_value, 1);
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if (ret) {
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LOG_ERR("Unable to get actual register value [%02X]", reg);
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return ret;
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}
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}
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actual_value = (actual_value & ~mask) | (value & mask);
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return i2c_burst_write_dt(i2c, reg, &actual_value, 1);
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}
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#define cs43l22_soft_power_down(_i2c) cs43l22_write(_i2c, REG_POWER_CTL_1, 0x01)
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#define cs43l22_soft_power_up(_i2c) cs43l22_write(_i2c, REG_POWER_CTL_1, 0x9e)
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struct cs43l22_config {
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struct i2c_dt_spec i2c;
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struct gpio_dt_spec reset_gpio;
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};
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static int cs43l22_configure(const struct device *dev, struct audio_codec_cfg *audiocfg)
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{
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uint8_t format, wordlen;
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const struct cs43l22_config *cfg = dev->config;
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if (audiocfg->dai_route != AUDIO_ROUTE_PLAYBACK) {
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return -ENOTSUP;
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}
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switch (audiocfg->dai_type) {
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case AUDIO_DAI_TYPE_LEFT_JUSTIFIED:
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format = DAC_IF_FORMAT_LEFT_JUSTIFIED;
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break;
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case AUDIO_DAI_TYPE_I2S:
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format = DAC_IF_FORMAT_I2S;
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break;
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case AUDIO_DAI_TYPE_RIGHT_JUSTIFIED:
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format = DAC_IF_FORMAT_RIGHT_JUSTIFIED;
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break;
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default:
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return -ENOTSUP;
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}
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if (format == DAC_IF_FORMAT_RIGHT_JUSTIFIED) {
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switch (audiocfg->dai_cfg.i2s.word_size) {
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case 16:
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wordlen = WORDLEN_RIGHT_16;
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break;
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case 18:
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wordlen = WORDLEN_RIGHT_18;
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break;
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case 20:
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wordlen = WORDLEN_RIGHT_20;
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break;
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case 24:
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wordlen = WORDLEN_RIGHT_24;
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break;
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default:
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return -ENOTSUP;
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}
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} else {
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switch (audiocfg->dai_cfg.i2s.word_size) {
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case 16:
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wordlen = WORDLEN_16;
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break;
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case 20:
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wordlen = WORDLEN_20;
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break;
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case 24:
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wordlen = WORDLEN_24;
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break;
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case 32:
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wordlen = WORDLEN_32;
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break;
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default:
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return -ENOTSUP;
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}
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}
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if (cs43l22_soft_power_down(&cfg->i2c)) {
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return -EIO;
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}
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/* Set automatic clock detection */
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if (cs43l22_write(&cfg->i2c, REG_CLOCKING_CTL, (1 << 7))) {
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return -EIO;
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}
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/* Set input audio format */
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if (cs43l22_write_masked(&cfg->i2c, REG_INTERFACE_CTL_1, (format << 2) | wordlen, 0xdf)) {
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return -EIO;
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}
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if (cs43l22_soft_power_up(&cfg->i2c)) {
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return -EIO;
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}
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return 0;
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}
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static void cs43l22_start_output(const struct device *dev)
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{
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}
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static void cs43l22_stop_output(const struct device *dev)
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{
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}
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static int cs43l22_apply_properties(const struct device *dev)
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{
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return 0;
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}
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static inline int cs43l22_set_mute(const struct i2c_dt_spec *i2c,
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audio_channel_t channel, bool mute)
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{
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uint8_t chan_mute_mask = 0;
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switch (channel) {
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case AUDIO_CHANNEL_ALL:
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chan_mute_mask = HEADPHONES_A_MUTE
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| HEADPHONES_B_MUTE
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| SPEAKER_A_MUTE
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| SPEAKER_B_MUTE;
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break;
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case AUDIO_CHANNEL_HEADPHONE_LEFT:
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chan_mute_mask = HEADPHONES_A_MUTE;
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break;
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case AUDIO_CHANNEL_HEADPHONE_RIGHT:
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chan_mute_mask = HEADPHONES_B_MUTE;
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break;
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case AUDIO_CHANNEL_FRONT_LEFT:
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chan_mute_mask = SPEAKER_A_MUTE;
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break;
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case AUDIO_CHANNEL_FRONT_RIGHT:
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chan_mute_mask = SPEAKER_B_MUTE;
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break;
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default:
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return -ENOTSUP;
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}
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return cs43l22_write_masked(i2c, REG_PLAYBACK_CTL_2,
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mute * chan_mute_mask, chan_mute_mask);
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}
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static inline int cs43l22_set_volume(const struct i2c_dt_spec *i2c,
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audio_channel_t channel, int vol)
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{
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uint8_t reg;
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uint8_t volume_scaled = 65 + (191 * vol / 100);
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switch (channel) {
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case AUDIO_CHANNEL_HEADPHONE_LEFT:
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reg = REG_HEADPHONES_A_VOL;
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break;
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case AUDIO_CHANNEL_HEADPHONE_RIGHT:
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reg = REG_HEADPHONES_B_VOL;
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break;
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case AUDIO_CHANNEL_FRONT_LEFT:
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reg = REG_SPEAKER_A_VOL;
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break;
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case AUDIO_CHANNEL_FRONT_RIGHT:
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reg = REG_SPEAKER_B_VOL;
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break;
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default:
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return -ENOTSUP;
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}
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return cs43l22_write(i2c, reg, volume_scaled);
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}
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static int cs43l22_set_property(const struct device *dev, audio_property_t property,
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audio_channel_t channel, audio_property_value_t val)
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{
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const struct cs43l22_config *cfg = dev->config;
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switch (property) {
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case AUDIO_PROPERTY_OUTPUT_MUTE:
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return cs43l22_set_mute(&cfg->i2c, channel, val.mute);
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case AUDIO_PROPERTY_OUTPUT_VOLUME:
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return cs43l22_set_volume(&cfg->i2c, channel, val.vol);
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default:
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return -ENOTSUP;
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}
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}
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static const struct audio_codec_api cs43l22_api = {
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.configure = cs43l22_configure,
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.start_output = cs43l22_start_output,
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.stop_output = cs43l22_stop_output,
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.set_property = cs43l22_set_property,
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.apply_properties = cs43l22_apply_properties,
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};
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static int cs43l22_init(const struct device *dev)
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{
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uint8_t regval;
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const struct cs43l22_config *cfg = dev->config;
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int ret;
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ret = gpio_pin_configure_dt(&cfg->reset_gpio, GPIO_OUTPUT_ACTIVE);
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if (ret) {
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return -EIO;
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}
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ret = i2c_burst_read_dt(&cfg->i2c, REG_ID, ®val, 1);
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if (ret) {
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LOG_ERR("Unable to read device ID");
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return -ENODEV;
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}
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if ((regval >> 3) != 0x1C) {
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LOG_ERR("Wrong Chip ID");
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return -ENODEV;
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}
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LOG_DBG("Found CS43L22 (chip=%02X, rev=%c%d)",
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regval >> 3, 'A' + ((regval >> 1) & 3), regval & 1);
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return 0;
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}
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#define CS43L22_INIT(inst) \
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static const struct cs43l22_config cs43l22_config_##inst = { \
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.i2c = I2C_DT_SPEC_INST_GET(inst), \
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.reset_gpio = GPIO_DT_SPEC_INST_GET(inst, reset_gpios), \
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}; \
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DEVICE_DT_INST_DEFINE(inst, cs43l22_init, NULL, NULL, \
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&cs43l22_config_##inst, POST_KERNEL, \
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CONFIG_AUDIO_CODEC_INIT_PRIORITY, \
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&cs43l22_api);
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DT_INST_FOREACH_STATUS_OKAY(CS43L22_INIT)
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