mirror of
https://github.com/zephyrproject-rtos/zephyr
synced 2025-09-02 02:33:18 +00:00
1d6a453a6a
First commit to add support for ili9806e_dsi driver Signed-off-by: The Nguyen <the.nguyen.yf@renesas.com>
435 lines
14 KiB
C
435 lines
14 KiB
C
/*
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* Copyright (c) 2024 Renesas Electronics Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT ilitek_ili9806e_dsi
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#include <zephyr/kernel.h>
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#include <zephyr/drivers/display.h>
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#include <zephyr/drivers/mipi_dsi.h>
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#include <zephyr/drivers/gpio.h>
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#include <zephyr/sys/byteorder.h>
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#include <zephyr/logging/log.h>
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#include "display_ili9806e_dsi.h"
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LOG_MODULE_REGISTER(display_ili9806e_dsi, CONFIG_DISPLAY_LOG_LEVEL);
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#define ILITEK_ILI9806E_COLMOD_RGB565 0x50
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#define ILITEK_ILI9806E_COLMOD_RGB888 0x70
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struct ili9806e_config {
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const struct device *mipi_dsi;
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const struct gpio_dt_spec reset;
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const struct gpio_dt_spec backlight;
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enum display_pixel_format pixel_format;
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uint8_t data_lanes;
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uint16_t width;
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uint16_t height;
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uint8_t channel;
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};
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struct ili9806e_init_cmd {
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uint8_t reg;
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uint8_t cmd_len;
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uint8_t cmd[5];
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} __packed;
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static const struct ili9806e_init_cmd init_cmds[] = {
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/* Change to Page 1 CMD */
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{.reg = 0xff, .cmd_len = 5, .cmd = {0xFF, 0x98, 0x06, 0x04, 0x01}},
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/* Output SDA */
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{.reg = 0x08, .cmd_len = 1, .cmd = {0x10}},
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/* DE = 1 Active */
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{.reg = 0x21, .cmd_len = 1, .cmd = {0x01}},
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/* Resolution setting 480 X 800 */
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{.reg = 0x30, .cmd_len = 1, .cmd = {0x01}},
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/* Inversion setting */
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{.reg = 0x31, .cmd_len = 1, .cmd = {0x00}},
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/* BT 15 */
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{.reg = 0x40, .cmd_len = 1, .cmd = {0x14}},
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/* avdd +5.2v,avee-5.2v */
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{.reg = 0x41, .cmd_len = 1, .cmd = {0x33}},
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/* VGL=DDVDL+VCL-VCIP,VGH=2DDVDH-DDVDL */
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{.reg = 0x42, .cmd_len = 1, .cmd = {0x02}},
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/* Set VGH clamp level */
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{.reg = 0x43, .cmd_len = 1, .cmd = {0x09}},
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/* Set VGL clamp level */
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{.reg = 0x44, .cmd_len = 1, .cmd = {0x06}},
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/* Set VREG1 */
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{.reg = 0x50, .cmd_len = 1, .cmd = {0x70}},
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/* Set VREG2 */
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{.reg = 0x51, .cmd_len = 1, .cmd = {0x70}},
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/* Flicker MSB */
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{.reg = 0x52, .cmd_len = 1, .cmd = {0x00}},
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/* Flicker LSB */
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{.reg = 0x53, .cmd_len = 1, .cmd = {0x48}},
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/* Timing Adjust */
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{.reg = 0x60, .cmd_len = 1, .cmd = {0x07}},
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{.reg = 0x61, .cmd_len = 1, .cmd = {0x00}},
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{.reg = 0x62, .cmd_len = 1, .cmd = {0x08}},
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{.reg = 0x63, .cmd_len = 1, .cmd = {0x00}},
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/* Positive Gamma Control 1 */
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{.reg = 0xa0, .cmd_len = 1, .cmd = {0x00}},
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/* Positive Gamma Control 2 */
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{.reg = 0xa1, .cmd_len = 1, .cmd = {0x03}},
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/* Positive Gamma Control 3 */
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{.reg = 0xa2, .cmd_len = 1, .cmd = {0x09}},
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/* Positive Gamma Control 4 */
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{.reg = 0xa3, .cmd_len = 1, .cmd = {0x0d}},
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/* Positive Gamma Control 5 */
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{.reg = 0xa4, .cmd_len = 1, .cmd = {0x06}},
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/* Positive Gamma Control 6 */
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{.reg = 0xa5, .cmd_len = 1, .cmd = {0x16}},
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/* Positive Gamma Control 7 */
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{.reg = 0xa6, .cmd_len = 1, .cmd = {0x09}},
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/* Positive Gamma Control 8 */
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{.reg = 0xa7, .cmd_len = 1, .cmd = {0x08}},
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/* Positive Gamma Control 9 */
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{.reg = 0xa8, .cmd_len = 1, .cmd = {0x03}},
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/* Positive Gamma Control 10 */
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{.reg = 0xa9, .cmd_len = 1, .cmd = {0x07}},
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/* Positive Gamma Control 11 */
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{.reg = 0xaa, .cmd_len = 1, .cmd = {0x06}},
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/* Positive Gamma Control 12 */
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{.reg = 0xab, .cmd_len = 1, .cmd = {0x05}},
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/* Positive Gamma Control 13 */
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{.reg = 0xac, .cmd_len = 1, .cmd = {0x0d}},
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/* Positive Gamma Control 14 */
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{.reg = 0xad, .cmd_len = 1, .cmd = {0x2c}},
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/* Positive Gamma Control 15 */
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{.reg = 0xae, .cmd_len = 1, .cmd = {0x26}},
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/* Positive Gamma Control 16 */
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{.reg = 0xaf, .cmd_len = 1, .cmd = {0x00}},
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/* Negative Gamma Correction 1 */
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{.reg = 0xc0, .cmd_len = 1, .cmd = {0x00}},
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/* Negative Gamma Correction 2 */
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{.reg = 0xc1, .cmd_len = 1, .cmd = {0x04}},
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/* Negative Gamma Correction 3 */
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{.reg = 0xc2, .cmd_len = 1, .cmd = {0x0b}},
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/* Negative Gamma Correction 4 */
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{.reg = 0xc3, .cmd_len = 1, .cmd = {0x0f}},
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/* Negative Gamma Correction 5 */
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{.reg = 0xc4, .cmd_len = 1, .cmd = {0x09}},
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/* Negative Gamma Correction 6 */
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{.reg = 0xc5, .cmd_len = 1, .cmd = {0x18}},
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/* Negative Gamma Correction 7 */
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{.reg = 0xc6, .cmd_len = 1, .cmd = {0x07}},
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/* Negative Gamma Correction 8 */
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{.reg = 0xc7, .cmd_len = 1, .cmd = {0x08}},
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/* Negative Gamma Correction 9 */
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{.reg = 0xc8, .cmd_len = 1, .cmd = {0x05}},
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/* Negative Gamma Correction 10 */
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{.reg = 0xc9, .cmd_len = 1, .cmd = {0x09}},
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/* Negative Gamma Correction 11 */
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{.reg = 0xca, .cmd_len = 1, .cmd = {0x07}},
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/* Negative Gamma Correction 12 */
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{.reg = 0xcb, .cmd_len = 1, .cmd = {0x05}},
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/* Negative Gamma Correction 13 */
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{.reg = 0xcc, .cmd_len = 1, .cmd = {0x0c}},
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/* Negative Gamma Correction 14 */
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{.reg = 0xcd, .cmd_len = 1, .cmd = {0x2d}},
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/* Negative Gamma Correction 15 */
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{.reg = 0xce, .cmd_len = 1, .cmd = {0x28}},
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/* Negative Gamma Correction 16 */
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{.reg = 0xcf, .cmd_len = 1, .cmd = {0x00}},
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/* Change to Page 6 CMD for GIP timing */
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{.reg = 0xff, .cmd_len = 5, .cmd = {0xFF, 0x98, 0x06, 0x04, 0x06}},
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/* GIP Control 1 */
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{.reg = 0x00, .cmd_len = 1, .cmd = {0x21}},
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{.reg = 0x01, .cmd_len = 1, .cmd = {0x09}},
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{.reg = 0x02, .cmd_len = 1, .cmd = {0x00}},
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{.reg = 0x03, .cmd_len = 1, .cmd = {0x00}},
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{.reg = 0x04, .cmd_len = 1, .cmd = {0x01}},
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{.reg = 0x05, .cmd_len = 1, .cmd = {0x01}},
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{.reg = 0x06, .cmd_len = 1, .cmd = {0x80}},
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{.reg = 0x07, .cmd_len = 1, .cmd = {0x05}},
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{.reg = 0x08, .cmd_len = 1, .cmd = {0x02}},
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{.reg = 0x09, .cmd_len = 1, .cmd = {0x80}},
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{.reg = 0x0a, .cmd_len = 1, .cmd = {0x00}},
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{.reg = 0x0b, .cmd_len = 1, .cmd = {0x00}},
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{.reg = 0x0c, .cmd_len = 1, .cmd = {0x0a}},
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{.reg = 0x0d, .cmd_len = 1, .cmd = {0x0a}},
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{.reg = 0x0e, .cmd_len = 1, .cmd = {0x00}},
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{.reg = 0x0f, .cmd_len = 1, .cmd = {0x00}},
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{.reg = 0x10, .cmd_len = 1, .cmd = {0xe0}},
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{.reg = 0x11, .cmd_len = 1, .cmd = {0xe4}},
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{.reg = 0x12, .cmd_len = 1, .cmd = {0x04}},
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{.reg = 0x13, .cmd_len = 1, .cmd = {0x00}},
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{.reg = 0x14, .cmd_len = 1, .cmd = {0x00}},
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{.reg = 0x15, .cmd_len = 1, .cmd = {0xc0}},
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{.reg = 0x16, .cmd_len = 1, .cmd = {0x08}},
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{.reg = 0x17, .cmd_len = 1, .cmd = {0x00}},
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{.reg = 0x18, .cmd_len = 1, .cmd = {0x00}},
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{.reg = 0x19, .cmd_len = 1, .cmd = {0x00}},
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{.reg = 0x1a, .cmd_len = 1, .cmd = {0x00}},
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{.reg = 0x1b, .cmd_len = 1, .cmd = {0x00}},
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{.reg = 0x1c, .cmd_len = 1, .cmd = {0x00}},
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{.reg = 0x1d, .cmd_len = 1, .cmd = {0x00}},
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/* GIP Control 2 */
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{.reg = 0x20, .cmd_len = 1, .cmd = {0x01}},
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{.reg = 0x21, .cmd_len = 1, .cmd = {0x23}},
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{.reg = 0x22, .cmd_len = 1, .cmd = {0x45}},
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{.reg = 0x23, .cmd_len = 1, .cmd = {0x67}},
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{.reg = 0x24, .cmd_len = 1, .cmd = {0x01}},
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{.reg = 0x25, .cmd_len = 1, .cmd = {0x23}},
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{.reg = 0x26, .cmd_len = 1, .cmd = {0x45}},
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{.reg = 0x27, .cmd_len = 1, .cmd = {0x67}},
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/* GIP Control 3 */
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{.reg = 0x30, .cmd_len = 1, .cmd = {0x01}},
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{.reg = 0x31, .cmd_len = 1, .cmd = {0x11}},
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{.reg = 0x32, .cmd_len = 1, .cmd = {0x00}},
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{.reg = 0x33, .cmd_len = 1, .cmd = {0xee}},
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{.reg = 0x34, .cmd_len = 1, .cmd = {0xff}},
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{.reg = 0x35, .cmd_len = 1, .cmd = {0xcb}},
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{.reg = 0x36, .cmd_len = 1, .cmd = {0xda}},
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{.reg = 0x37, .cmd_len = 1, .cmd = {0xad}},
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{.reg = 0x38, .cmd_len = 1, .cmd = {0xbc}},
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{.reg = 0x39, .cmd_len = 1, .cmd = {0x76}},
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{.reg = 0x3a, .cmd_len = 1, .cmd = {0x67}},
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{.reg = 0x3b, .cmd_len = 1, .cmd = {0x22}},
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{.reg = 0x3c, .cmd_len = 1, .cmd = {0x22}},
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{.reg = 0x3d, .cmd_len = 1, .cmd = {0x22}},
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{.reg = 0x3e, .cmd_len = 1, .cmd = {0x22}},
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{.reg = 0x3f, .cmd_len = 1, .cmd = {0x22}},
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{.reg = 0x40, .cmd_len = 1, .cmd = {0x22}},
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/* GOUT VGLO Control */
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{.reg = 0x53, .cmd_len = 1, .cmd = {0x10}},
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{.reg = 0x54, .cmd_len = 1, .cmd = {0x10}},
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/* Change to Page 7 CMD for Normal command */
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{.reg = 0xff, .cmd_len = 5, .cmd = {0xff, 0x98, 0x06, 0x04, 0x07}},
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/* VREG1/2OUT ENABLE */
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{.reg = 0x18, .cmd_len = 1, .cmd = {0x1d}},
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{.reg = 0x26, .cmd_len = 1, .cmd = {0xb2}},
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{.reg = 0x02, .cmd_len = 1, .cmd = {0x77}},
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{.reg = 0xe1, .cmd_len = 1, .cmd = {0x79}},
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{.reg = 0x17, .cmd_len = 1, .cmd = {0x22}},
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/* Change to Page 0 CMD for Normal command */
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{.reg = 0xff, .cmd_len = 5, .cmd = {0xff, 0x98, 0x06, 0x04, 0x00}}};
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static int ili9806e_write_reg(const struct device *dev, uint8_t reg, const uint8_t *buf, size_t len)
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{
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int ret;
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const struct ili9806e_config *cfg = dev->config;
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ret = mipi_dsi_dcs_write(cfg->mipi_dsi, cfg->channel, reg, buf, len);
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if (ret < 0) {
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LOG_ERR("Failed writing reg: 0x%x result: (%d)", reg, ret);
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return ret;
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}
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return 0;
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}
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static int ili9806e_write_reg_val(const struct device *dev, uint8_t reg, uint8_t value)
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{
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return ili9806e_write_reg(dev, reg, &value, 1);
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}
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static int ili9806e_write_sequence(const struct device *dev, const struct ili9806e_init_cmd *cmd,
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uint8_t nr_cmds)
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{
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int ret = 0;
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/* Loop through all commands as long as writes are successful */
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for (int i = 0; i < nr_cmds && ret == 0; i++) {
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ret = ili9806e_write_reg(dev, cmd->reg, cmd->cmd, cmd->cmd_len);
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if (ret < 0) {
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LOG_ERR("Failed writing sequence: 0x%x result: (%d)", cmd->reg, ret);
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return ret;
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}
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cmd++;
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}
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return ret;
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}
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static int ili9806e_config(const struct device *dev)
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{
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const struct ili9806e_config *cfg = dev->config;
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int ret;
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ret = ili9806e_write_sequence(dev, init_cmds, ARRAY_SIZE(init_cmds));
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if (ret < 0) {
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return ret;
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}
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/* Add a delay, otherwise MADCTL not taken */
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k_msleep(120);
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/* Exit sleep mode */
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ret = ili9806e_write_reg(dev, MIPI_DCS_EXIT_SLEEP_MODE, NULL, 0);
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if (ret < 0) {
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return ret;
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}
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/* Wait for sleep out exit */
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k_msleep(5);
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/* Set color mode */
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ret = ili9806e_write_reg_val(dev, MIPI_DCS_SET_PIXEL_FORMAT,
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cfg->pixel_format == PIXEL_FORMAT_RGB_565
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? ILITEK_ILI9806E_COLMOD_RGB565
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: ILITEK_ILI9806E_COLMOD_RGB888);
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if (ret < 0) {
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return ret;
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}
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/* Turn on display */
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ret = ili9806e_write_reg(dev, MIPI_DCS_SET_DISPLAY_ON, NULL, 0);
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return ret;
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}
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static int ili9806e_blanking_on(const struct device *dev)
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{
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const struct ili9806e_config *cfg = dev->config;
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int ret;
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if (cfg->backlight.port != NULL) {
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ret = gpio_pin_set_dt(&cfg->backlight, 0);
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if (ret) {
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LOG_ERR("Disable backlight failed! (%d)", ret);
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return ret;
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}
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}
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return ili9806e_write_reg(dev, MIPI_DCS_SET_DISPLAY_OFF, NULL, 0);
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}
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static int ili9806e_blanking_off(const struct device *dev)
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{
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const struct ili9806e_config *cfg = dev->config;
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int ret;
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if (cfg->backlight.port != NULL) {
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ret = gpio_pin_set_dt(&cfg->backlight, 1);
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if (ret) {
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LOG_ERR("Enable backlight failed! (%d)", ret);
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return ret;
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}
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}
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return ili9806e_write_reg(dev, MIPI_DCS_SET_DISPLAY_ON, NULL, 0);
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}
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static void ili9806e_get_capabilities(const struct device *dev,
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struct display_capabilities *capabilities)
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{
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const struct ili9806e_config *cfg = dev->config;
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memset(capabilities, 0, sizeof(struct display_capabilities));
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capabilities->x_resolution = cfg->width;
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capabilities->y_resolution = cfg->height;
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capabilities->supported_pixel_formats = cfg->pixel_format;
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capabilities->current_pixel_format = cfg->pixel_format;
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}
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static int ili9806e_pixel_format(const struct device *dev,
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const enum display_pixel_format pixel_format)
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{
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const struct ili9806e_config *config = dev->config;
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LOG_WRN("Pixel format change not implemented");
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if (pixel_format == config->pixel_format) {
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return 0;
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}
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return -ENOTSUP;
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}
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static DEVICE_API(display, ili9806e_api) = {
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.blanking_on = ili9806e_blanking_on,
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.blanking_off = ili9806e_blanking_off,
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.set_pixel_format = ili9806e_pixel_format,
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.get_capabilities = ili9806e_get_capabilities,
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};
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static int ili9806e_init(const struct device *dev)
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{
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const struct ili9806e_config *cfg = dev->config;
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struct mipi_dsi_device mdev;
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int ret;
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if (cfg->reset.port) {
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if (!gpio_is_ready_dt(&cfg->reset)) {
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LOG_ERR("Reset GPIO device is not ready!");
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return -ENODEV;
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}
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k_sleep(K_MSEC(1));
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ret = gpio_pin_configure_dt(&cfg->reset, GPIO_OUTPUT_INACTIVE);
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if (ret < 0) {
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LOG_ERR("Reset display failed! (%d)", ret);
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return ret;
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}
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ret = gpio_pin_set_dt(&cfg->reset, 0);
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if (ret < 0) {
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LOG_ERR("Reset display failed! (%d)", ret);
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return ret;
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}
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k_sleep(K_MSEC(1));
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ret = gpio_pin_set_dt(&cfg->reset, 1);
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if (ret < 0) {
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LOG_ERR("Enable display failed! (%d)", ret);
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return ret;
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}
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k_sleep(K_MSEC(50));
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}
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/* attach to MIPI-DSI host */
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if (cfg->pixel_format == PIXEL_FORMAT_RGB_565) {
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mdev.pixfmt = MIPI_DSI_PIXFMT_RGB565;
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} else {
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mdev.pixfmt = MIPI_DSI_PIXFMT_RGB888;
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}
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mdev.data_lanes = cfg->data_lanes;
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mdev.mode_flags = MIPI_DSI_MODE_VIDEO;
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mdev.timings.hactive = cfg->width;
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mdev.timings.hbp = ILITEK_ILI9806E_HBP;
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mdev.timings.hfp = ILITEK_ILI9806E_HFP;
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mdev.timings.hsync = ILITEK_ILI9806E_HSYNC;
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mdev.timings.vactive = cfg->height;
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mdev.timings.vbp = ILITEK_ILI9806E_VBP;
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mdev.timings.vfp = ILITEK_ILI9806E_VFP;
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mdev.timings.vsync = ILITEK_ILI9806E_VSYNC;
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|
|
|
ret = mipi_dsi_attach(cfg->mipi_dsi, cfg->channel, &mdev);
|
|
if (ret < 0) {
|
|
LOG_ERR("Could not attach to MIPI-DSI host");
|
|
return ret;
|
|
}
|
|
|
|
if (cfg->backlight.port != NULL) {
|
|
ret = gpio_pin_configure_dt(&cfg->backlight, GPIO_OUTPUT_ACTIVE);
|
|
if (ret < 0) {
|
|
LOG_ERR("Could not configure backlight GPIO (%d)", ret);
|
|
return ret;
|
|
}
|
|
}
|
|
|
|
ret = ili9806e_config(dev);
|
|
if (ret) {
|
|
LOG_ERR("DSI init sequence failed! (%d)", ret);
|
|
return ret;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
#define ILITEK_ILI9806E_DEFINE(n) \
|
|
static const struct ili9806e_config ili9806e_config_##n = { \
|
|
.mipi_dsi = DEVICE_DT_GET(DT_INST_BUS(n)), \
|
|
.reset = GPIO_DT_SPEC_INST_GET_OR(n, reset_gpios, {0}), \
|
|
.backlight = GPIO_DT_SPEC_INST_GET_OR(n, bl_gpios, {0}), \
|
|
.data_lanes = DT_INST_PROP_BY_IDX(n, data_lanes, 0), \
|
|
.width = DT_INST_PROP(n, width), \
|
|
.height = DT_INST_PROP(n, height), \
|
|
.channel = DT_INST_REG_ADDR(n), \
|
|
.pixel_format = DT_INST_PROP(n, pixel_format), \
|
|
}; \
|
|
DEVICE_DT_INST_DEFINE(n, &ili9806e_init, NULL, NULL, &ili9806e_config_##n, POST_KERNEL, \
|
|
CONFIG_DISPLAY_ILI9806E_DSI_INIT_PRIORITY, &ili9806e_api);
|
|
|
|
DT_INST_FOREACH_STATUS_OKAY(ILITEK_ILI9806E_DEFINE)
|