mirror of
https://github.com/zephyrproject-rtos/zephyr
synced 2025-09-03 06:01:57 +00:00
1d8ef88b95
Do not reconfigure the SHPHLD button behavior by writing to the sticky register in drivers: mfd, regulator: npm2100. This is removed to avoid unexpected behaviors during or after the ship or hibernation modes. Signed-off-by: Sergei Ovchinnikov <sergei.ovchinnikov@nordicsemi.no>
418 lines
12 KiB
C
418 lines
12 KiB
C
/*
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* Copyright (c) 2024 Nordic Semiconductor ASA
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT nordic_npm2100
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#include <errno.h>
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#include <zephyr/drivers/i2c.h>
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#include <zephyr/sys/util.h>
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#include <zephyr/sys/byteorder.h>
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#include <zephyr/drivers/gpio.h>
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#include <zephyr/drivers/gpio/gpio_utils.h>
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#include <zephyr/drivers/mfd/npm2100.h>
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#define EVENTS_SET 0x00U
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#define EVENTS_CLR 0x05U
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#define INTEN_SET 0x0AU
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#define GPIO_CONFIG 0x80U
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#define GPIO_USAGE 0x83U
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#define TIMER_TASKS_START 0xB0U
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#define TIMER_CONFIG 0xB3U
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#define TIMER_TARGET 0xB4U
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#define TIMER_STATUS 0xB7U
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#define SHPHLD_WAKEUP 0xC1U
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#define SHPHLD_SHPHLD 0xC2U
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#define HIBERNATE_TASKS_HIBER 0xC8U
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#define HIBERNATE_TASKS_HIBERPT 0xC9U
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#define RESET_TASKS_RESET 0xD0U
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#define RESET_BUTTON 0xD2U
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#define RESET_PIN 0xD3U
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#define RESET_WRITESTICKY 0xDBU
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#define RESET_STROBESTICKY 0xDCU
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#define SHPHLD_RESISTOR_MASK 0x03U
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#define SHPHLD_RESISTOR_PULLUP 0x00U
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#define SHPHLD_RESISTOR_NONE 0x01U
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#define SHPHLD_RESISTOR_PULLDOWN 0x02U
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#define SHPHLD_CURR_MASK 0x0CU
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#define SHPHLD_PULL_ENABLE 0x10U
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#define WAKEUP_EDGE_FALLING 0x00U
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#define WAKEUP_EDGE_RISING 0x01U
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#define WAKEUP_HIBERNATE_PIN 0x00U
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#define WAKEUP_HIBERNATE_NOPIN 0x02U
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#define TIMER_CONFIG_WKUP 3U
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#define TIMER_STATUS_IDLE 0U
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#define TIMER_PRESCALER_MUL 64ULL
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#define TIMER_PRESCALER_DIV 1000ULL
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#define TIMER_MAX 0xFFFFFFU
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#define EVENTS_SIZE 5U
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#define GPIO_USAGE_INTLO 0x01U
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#define GPIO_USAGE_INTHI 0x02U
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#define GPIO_CONFIG_OUTPUT 0x02U
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#define RESET_STICKY_PWRBUT 0x04U
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#define SHPHLD_LONGPRESS_SHIP 0
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#define SHPHLD_LONGPRESS_DISABLE 1
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#define SHPHLD_LONGPRESS_RESET 2
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struct mfd_npm2100_config {
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struct i2c_dt_spec i2c;
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struct gpio_dt_spec host_int_gpios;
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gpio_flags_t host_int_flags;
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gpio_pin_t pmic_int_pin;
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gpio_flags_t pmic_int_flags;
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gpio_flags_t shiphold_flags;
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uint8_t shiphold_longpress;
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uint8_t shiphold_current;
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uint8_t shiphold_hibernate_wakeup;
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};
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struct mfd_npm2100_data {
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const struct device *dev;
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struct gpio_callback gpio_cb;
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struct k_work work;
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sys_slist_t callbacks;
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};
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struct event_reg_t {
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uint8_t offset;
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uint8_t mask;
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};
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static const struct event_reg_t event_reg[NPM2100_EVENT_MAX] = {
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[NPM2100_EVENT_SYS_DIETEMP_WARN] = {0x00U, 0x01U},
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[NPM2100_EVENT_SYS_SHIPHOLD_FALL] = {0x00U, 0x02U},
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[NPM2100_EVENT_SYS_SHIPHOLD_RISE] = {0x00U, 0x04U},
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[NPM2100_EVENT_SYS_PGRESET_FALL] = {0x00U, 0x08U},
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[NPM2100_EVENT_SYS_PGRESET_RISE] = {0x00U, 0x10U},
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[NPM2100_EVENT_SYS_TIMER_EXPIRY] = {0x00U, 0x20U},
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[NPM2100_EVENT_ADC_VBAT_READY] = {0x01U, 0x01U},
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[NPM2100_EVENT_ADC_DIETEMP_READY] = {0x01U, 0x02U},
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[NPM2100_EVENT_ADC_DROOP_DETECT] = {0x01U, 0x04U},
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[NPM2100_EVENT_ADC_VOUT_READY] = {0x01U, 0x08U},
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[NPM2100_EVENT_GPIO0_FALL] = {0x02U, 0x01U},
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[NPM2100_EVENT_GPIO0_RISE] = {0x02U, 0x02U},
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[NPM2100_EVENT_GPIO1_FALL] = {0x02U, 0x04U},
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[NPM2100_EVENT_GPIO1_RISE] = {0x02U, 0x08U},
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[NPM2100_EVENT_BOOST_VBAT_WARN] = {0x03U, 0x01U},
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[NPM2100_EVENT_BOOST_VOUT_MIN] = {0x03U, 0x02U},
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[NPM2100_EVENT_BOOST_VOUT_WARN] = {0x03U, 0x04U},
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[NPM2100_EVENT_BOOST_VOUT_DPS] = {0x03U, 0x08U},
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[NPM2100_EVENT_BOOST_VOUT_OK] = {0x03U, 0x10U},
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[NPM2100_EVENT_LDOSW_OCP] = {0x04U, 0x01U},
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[NPM2100_EVENT_LDOSW_VINTFAIL] = {0x04U, 0x02U},
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};
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static void gpio_callback(const struct device *dev, struct gpio_callback *cb, uint32_t pins)
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{
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struct mfd_npm2100_data *data = CONTAINER_OF(cb, struct mfd_npm2100_data, gpio_cb);
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const struct mfd_npm2100_config *config = data->dev->config;
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if (config->host_int_flags & GPIO_INT_LEVEL_ACTIVE) {
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/* When using level irq, disable until it can be cleared in the work callback */
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gpio_pin_interrupt_configure_dt(&config->host_int_gpios, GPIO_INT_DISABLE);
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}
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k_work_submit(&data->work);
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}
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static void work_callback(struct k_work *work)
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{
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struct mfd_npm2100_data *data = CONTAINER_OF(work, struct mfd_npm2100_data, work);
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const struct mfd_npm2100_config *config = data->dev->config;
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uint8_t buf[EVENTS_SIZE + 1U] = {EVENTS_SET};
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int ret;
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/* Read MAIN SET registers into buffer, leaving space for register address */
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ret = i2c_write_read_dt(&config->i2c, &buf[0], 1U, &buf[1], EVENTS_SIZE);
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if (ret < 0) {
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k_work_submit(&data->work);
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goto enable_irq;
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}
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for (int i = 0; i < NPM2100_EVENT_MAX; i++) {
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if ((buf[event_reg[i].offset + 1U] & event_reg[i].mask) != 0U) {
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gpio_fire_callbacks(&data->callbacks, data->dev, BIT(i));
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}
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}
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/* Write read buffer back to clear registers to clear all processed events */
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buf[0] = EVENTS_CLR;
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ret = i2c_write_dt(&config->i2c, buf, EVENTS_SIZE + 1U);
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if (ret < 0) {
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k_work_submit(&data->work);
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goto enable_irq;
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}
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/* Resubmit handler to queue if interrupt is still active */
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if (gpio_pin_get_dt(&config->host_int_gpios) != 0) {
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k_work_submit(&data->work);
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}
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enable_irq:
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if (config->host_int_flags & GPIO_INT_LEVEL_ACTIVE) {
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/* Re-enable irq */
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gpio_pin_interrupt_configure_dt(&config->host_int_gpios, config->host_int_flags);
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}
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}
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static int config_pmic_int(const struct device *dev)
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{
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const struct mfd_npm2100_config *config = dev->config;
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uint8_t usage = GPIO_USAGE_INTHI;
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if (config->pmic_int_flags & GPIO_ACTIVE_LOW) {
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usage = GPIO_USAGE_INTLO;
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}
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/* Set specified PMIC pin to be interrupt output */
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int ret = i2c_reg_write_byte_dt(&config->i2c, GPIO_USAGE + config->pmic_int_pin, usage);
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if (ret < 0) {
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return ret;
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}
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/* Configure PMIC output pin */
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return i2c_reg_write_byte_dt(&config->i2c, GPIO_CONFIG + config->pmic_int_pin,
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GPIO_CONFIG_OUTPUT);
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}
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static int config_shphold(const struct device *dev)
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{
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const struct mfd_npm2100_config *config = dev->config;
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uint8_t reg;
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int ret;
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if (config->shiphold_longpress != SHPHLD_LONGPRESS_SHIP) {
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ret = i2c_reg_write_byte_dt(&config->i2c, RESET_WRITESTICKY, RESET_STICKY_PWRBUT);
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if (ret < 0) {
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return ret;
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}
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ret = i2c_reg_write_byte_dt(&config->i2c, RESET_STROBESTICKY, 1U);
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if (ret < 0) {
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return ret;
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}
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if (config->shiphold_longpress == SHPHLD_LONGPRESS_RESET) {
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ret = i2c_reg_write_byte_dt(&config->i2c, RESET_BUTTON, 0U);
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if (ret < 0) {
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return ret;
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}
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ret = i2c_reg_write_byte_dt(&config->i2c, RESET_PIN, 1U);
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if (ret < 0) {
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return ret;
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}
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}
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}
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reg = config->shiphold_hibernate_wakeup ? WAKEUP_HIBERNATE_PIN : WAKEUP_HIBERNATE_NOPIN;
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if ((config->shiphold_flags & GPIO_ACTIVE_LOW) == 0U) {
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reg |= WAKEUP_EDGE_RISING;
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}
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ret = i2c_reg_write_byte_dt(&config->i2c, SHPHLD_WAKEUP, reg);
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if (ret < 0) {
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return ret;
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}
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if ((config->shiphold_flags & GPIO_PULL_UP) != 0U) {
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reg = SHPHLD_RESISTOR_PULLUP;
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} else if ((config->shiphold_flags & GPIO_PULL_DOWN) != 0U) {
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reg = SHPHLD_RESISTOR_PULLDOWN;
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} else {
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reg = SHPHLD_RESISTOR_NONE;
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}
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if (config->shiphold_current != 0U) {
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reg |= FIELD_PREP(SHPHLD_CURR_MASK, (config->shiphold_current - 1U));
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reg |= SHPHLD_PULL_ENABLE;
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}
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return i2c_reg_write_byte_dt(&config->i2c, SHPHLD_SHPHLD, reg);
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}
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static int mfd_npm2100_init(const struct device *dev)
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{
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const struct mfd_npm2100_config *config = dev->config;
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struct mfd_npm2100_data *mfd_data = dev->data;
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int ret;
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if (!i2c_is_ready_dt(&config->i2c)) {
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return -ENODEV;
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}
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mfd_data->dev = dev;
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ret = config_shphold(dev);
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if (ret < 0) {
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return ret;
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}
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if (config->host_int_gpios.port == NULL) {
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return 0;
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}
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ret = config_pmic_int(dev);
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if (ret < 0) {
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return ret;
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}
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/* Configure host interrupt GPIO */
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if (!gpio_is_ready_dt(&config->host_int_gpios)) {
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return -ENODEV;
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}
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ret = gpio_pin_configure_dt(&config->host_int_gpios, GPIO_INPUT);
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if (ret < 0) {
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return ret;
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}
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gpio_init_callback(&mfd_data->gpio_cb, gpio_callback, BIT(config->host_int_gpios.pin));
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ret = gpio_add_callback_dt(&config->host_int_gpios, &mfd_data->gpio_cb);
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if (ret < 0) {
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return ret;
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}
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mfd_data->work.handler = work_callback;
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return gpio_pin_interrupt_configure_dt(&config->host_int_gpios, config->host_int_flags);
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}
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int mfd_npm2100_set_timer(const struct device *dev, uint32_t time_ms,
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enum mfd_npm2100_timer_mode mode)
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{
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const struct mfd_npm2100_config *config = dev->config;
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uint8_t buff[4] = {TIMER_TARGET};
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uint32_t ticks = (uint32_t)DIV_ROUND_CLOSEST(((uint64_t)time_ms * TIMER_PRESCALER_MUL),
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TIMER_PRESCALER_DIV);
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uint8_t timer_status;
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int ret;
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if (ticks > TIMER_MAX) {
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return -EINVAL;
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}
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ret = i2c_reg_read_byte_dt(&config->i2c, TIMER_STATUS, &timer_status);
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if (ret < 0) {
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return ret;
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}
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if (timer_status != TIMER_STATUS_IDLE) {
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return -EBUSY;
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}
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sys_put_be24(ticks, &buff[1]);
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ret = i2c_write_dt(&config->i2c, buff, sizeof(buff));
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if (ret < 0) {
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return ret;
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}
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return i2c_reg_write_byte_dt(&config->i2c, TIMER_CONFIG, mode);
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}
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int mfd_npm2100_start_timer(const struct device *dev)
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{
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const struct mfd_npm2100_config *config = dev->config;
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return i2c_reg_write_byte_dt(&config->i2c, TIMER_TASKS_START, 1U);
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}
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int mfd_npm2100_reset(const struct device *dev)
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{
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const struct mfd_npm2100_config *config = dev->config;
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return i2c_reg_write_byte_dt(&config->i2c, RESET_TASKS_RESET, 1U);
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}
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int mfd_npm2100_hibernate(const struct device *dev, uint32_t time_ms, bool pass_through)
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{
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const struct mfd_npm2100_config *config = dev->config;
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int ret;
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if (time_ms > 0) {
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ret = mfd_npm2100_set_timer(dev, time_ms, NPM2100_TIMER_MODE_WAKEUP);
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if (ret < 0) {
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return ret;
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}
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ret = mfd_npm2100_start_timer(dev);
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if (ret < 0) {
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return ret;
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}
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}
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return i2c_reg_write_byte_dt(
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&config->i2c, pass_through ? HIBERNATE_TASKS_HIBERPT : HIBERNATE_TASKS_HIBER, 1U);
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}
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int mfd_npm2100_add_callback(const struct device *dev, struct gpio_callback *callback)
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{
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const struct mfd_npm2100_config *config = dev->config;
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struct mfd_npm2100_data *data = dev->data;
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/* Enable interrupts for specified events */
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for (int i = 0; i < NPM2100_EVENT_MAX; i++) {
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if ((callback->pin_mask & BIT(i)) != 0U) {
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/* Clear pending interrupt */
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int ret = i2c_reg_write_byte_dt(
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&config->i2c, event_reg[i].offset + EVENTS_CLR, event_reg[i].mask);
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if (ret < 0) {
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return ret;
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}
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ret = i2c_reg_write_byte_dt(&config->i2c, event_reg[i].offset + INTEN_SET,
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event_reg[i].mask);
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if (ret < 0) {
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return ret;
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}
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}
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}
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return gpio_manage_callback(&data->callbacks, callback, true);
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}
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int mfd_npm2100_remove_callback(const struct device *dev, struct gpio_callback *callback)
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{
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struct mfd_npm2100_data *data = dev->data;
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return gpio_manage_callback(&data->callbacks, callback, false);
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}
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#define MFD_NPM2100_DEFINE(inst) \
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static struct mfd_npm2100_data data##inst; \
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\
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static const struct mfd_npm2100_config config##inst = { \
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.i2c = I2C_DT_SPEC_INST_GET(inst), \
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.host_int_gpios = GPIO_DT_SPEC_INST_GET_OR(inst, host_int_gpios, {0}), \
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.host_int_flags = DT_INST_ENUM_IDX_OR(inst, host_int_type, 0) == 0 \
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? GPIO_INT_EDGE_TO_ACTIVE \
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: GPIO_INT_LEVEL_ACTIVE, \
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.pmic_int_pin = DT_INST_PROP_OR(inst, pmic_int_pin, 0), \
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.pmic_int_flags = DT_INST_PROP_OR(inst, pmic_int_flags, 0), \
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.shiphold_flags = \
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DT_INST_PROP_OR(inst, shiphold_flags, (GPIO_ACTIVE_LOW | GPIO_PULL_UP)), \
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.shiphold_longpress = DT_INST_ENUM_IDX_OR(inst, shiphold_longpress, 0), \
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.shiphold_current = DT_INST_ENUM_IDX_OR(inst, shiphold_current, 0), \
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.shiphold_hibernate_wakeup = DT_INST_PROP_OR(inst, shiphold_hibernate_wakeup, 0), \
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}; \
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\
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DEVICE_DT_INST_DEFINE(inst, mfd_npm2100_init, NULL, &data##inst, &config##inst, \
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POST_KERNEL, CONFIG_MFD_INIT_PRIORITY, NULL);
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DT_INST_FOREACH_STATUS_OKAY(MFD_NPM2100_DEFINE)
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