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CONFIG_IWDG_STM32_TIMEOUT allowed values of 100 us for initial watchdog timeout, which was actually rounded to zero in the driver, which uses milliseconds resolution for timeouts. This resulted in the reload value being set to maximum possible (calculation: 0U - 1). This commit updates the calculation of timeout minimum and maximum values considering the actual LSI frequency of the used MCU. As the resolution of CONFIG_IWDG_STM32_TIMEOUT in microseconds doesn't make sense if the driver supports only milliseconds, it is renamed to IWDG_STM32_INITIAL_TIMEOUT (this prevents accidental wrong settings in existing firmware) and the unit is changed to ms. Signed-off-by: Martin Jäger <martin@libre.solar>
35 lines
1.0 KiB
Plaintext
35 lines
1.0 KiB
Plaintext
# STM32 IWDG configuration
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# Copyright (c) 2016 Open-RnD Sp. z o.o.
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# Copyright (c) 2017 RnDity Sp. z o.o.
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# Copyright (c) 2019 Centaur Analytics, Inc
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# SPDX-License-Identifier: Apache-2.0
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menuconfig IWDG_STM32
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bool "Independent Watchdog (IWDG) Driver for STM32 family of MCUs"
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depends on SOC_FAMILY_STM32
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help
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Enable IWDG driver for STM32 line of MCUs
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config IWDG_STM32_INITIAL_TIMEOUT
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int "Value for IWDG timeout in ms"
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depends on IWDG_STM32
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default 100
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range 1 26214
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help
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Set initial timeout value for IWDG in ms if enabled at boot.
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The min timeout supported is 1 ms. The max timeout depends on the
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MCU's LSI clock frequency and can be calculated with:
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max. prescaler value (256) * max. reload ticks (4096) / LSI freq.
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Limiting maximum timeout to a safe value of 26214 ms here, which was
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calculated for highest LSI frequency among STM32 MCUs of 40 kHz.
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config WWDG_STM32
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bool "System Window Watchdog (WWDG) Driver for STM32 family of MCUs"
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depends on SOC_FAMILY_STM32
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help
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Enable WWDG driver for STM32 line of MCUs
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