mirror of
https://github.com/zephyrproject-rtos/zephyr
synced 2025-09-03 09:31:56 +00:00
e18fcbba5a
Now that device_api attribute is unmodified at runtime, as well as all the other attributes, it is possible to switch all device driver instance to be constant. A coccinelle rule is used for this: @r_const_dev_1 disable optional_qualifier @ @@ -struct device * +const struct device * @r_const_dev_2 disable optional_qualifier @ @@ -struct device * const +const struct device * Fixes #27399 Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
285 lines
9.0 KiB
C
285 lines
9.0 KiB
C
/*
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* Copyright (c) 2020, NXP
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <init.h>
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#include <fsl_iopctl.h>
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#include <soc.h>
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static int mimxrt685_evk_pinmux_init(const struct device *dev)
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{
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ARG_UNUSED(dev);
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#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(flexcomm0), nxp_lpc_usart, okay) && CONFIG_SERIAL
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/* USART0 RX, TX */
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const uint32_t port0_pin1_config = (/* Pin is configured as FC0_TXD_SCL_MISO_WS */
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IOPCTL_PIO_FUNC1 |
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/* Disable pull-up / pull-down function */
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IOPCTL_PIO_PUPD_DI |
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/* Enable pull-down function */
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IOPCTL_PIO_PULLDOWN_EN |
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/* Disable input buffer function */
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IOPCTL_PIO_INBUF_DI |
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/* Normal mode */
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IOPCTL_PIO_SLEW_RATE_NORMAL |
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/* Normal drive */
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IOPCTL_PIO_FULLDRIVE_DI |
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/* Analog mux is disabled */
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IOPCTL_PIO_ANAMUX_DI |
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/* Pseudo Output Drain is disabled */
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IOPCTL_PIO_PSEDRAIN_DI |
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/* Input function is not inverted */
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IOPCTL_PIO_INV_DI);
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/* PORT0 PIN1 (coords: G2) is configured as FC0_TXD_SCL_MISO_WS */
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IOPCTL_PinMuxSet(IOPCTL, 0U, 1U, port0_pin1_config);
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const uint32_t port0_pin2_config = (/* Pin is configured as FC0_RXD_SDA_MOSI_DATA */
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IOPCTL_PIO_FUNC1 |
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/* Disable pull-up / pull-down function */
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IOPCTL_PIO_PUPD_DI |
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/* Enable pull-down function */
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IOPCTL_PIO_PULLDOWN_EN |
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/* Enables input buffer function */
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IOPCTL_PIO_INBUF_EN |
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/* Normal mode */
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IOPCTL_PIO_SLEW_RATE_NORMAL |
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/* Normal drive */
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IOPCTL_PIO_FULLDRIVE_DI |
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/* Analog mux is disabled */
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IOPCTL_PIO_ANAMUX_DI |
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/* Pseudo Output Drain is disabled */
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IOPCTL_PIO_PSEDRAIN_DI |
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/* Input function is not inverted */
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IOPCTL_PIO_INV_DI);
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/* PORT0 PIN2 (coords: G4) is configured as FC0_RXD_SDA_MOSI_DATA */
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IOPCTL_PinMuxSet(IOPCTL, 0U, 2U, port0_pin2_config);
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#endif
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#if DT_PHA_HAS_CELL(DT_ALIAS(sw0), gpios, pin)
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const uint32_t port1_pin1_config = (/* Pin is configured as PIO1_1 */
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IOPCTL_PIO_FUNC0 |
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/* Disable pull-up / pull-down function */
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IOPCTL_PIO_PUPD_DI |
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/* Enable pull-down function */
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IOPCTL_PIO_PULLDOWN_EN |
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/* Enables input buffer function */
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IOPCTL_PIO_INBUF_EN |
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/* Normal mode */
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IOPCTL_PIO_SLEW_RATE_NORMAL |
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/* Normal drive */
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IOPCTL_PIO_FULLDRIVE_DI |
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/* Analog mux is disabled */
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IOPCTL_PIO_ANAMUX_DI |
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/* Pseudo Output Drain is disabled */
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IOPCTL_PIO_PSEDRAIN_DI |
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/* Input function is not inverted */
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IOPCTL_PIO_INV_DI);
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/* PORT1 PIN1 (coords: G15) is configured as PIO1_1 */
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IOPCTL_PinMuxSet(IOPCTL, 1U, 1U, port1_pin1_config);
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#endif
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#if DT_PHA_HAS_CELL(DT_ALIAS(sw1), gpios, pin)
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const uint32_t port0_pin10_config = (/* Pin is configured as PIO0_10 */
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IOPCTL_PIO_FUNC0 |
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/* Disable pull-up / pull-down function */
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IOPCTL_PIO_PUPD_DI |
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/* Enable pull-down function */
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IOPCTL_PIO_PULLDOWN_EN |
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/* Enables input buffer function */
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IOPCTL_PIO_INBUF_EN |
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/* Normal mode */
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IOPCTL_PIO_SLEW_RATE_NORMAL |
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/* Normal drive */
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IOPCTL_PIO_FULLDRIVE_DI |
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/* Analog mux is disabled */
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IOPCTL_PIO_ANAMUX_DI |
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/* Pseudo Output Drain is disabled */
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IOPCTL_PIO_PSEDRAIN_DI |
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/* Input function is not inverted */
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IOPCTL_PIO_INV_DI);
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/* PORT0 PIN10 (coords: J3) is configured as PIO0_10 */
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IOPCTL_PinMuxSet(IOPCTL, 0U, 10U, port0_pin10_config);
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#endif
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#ifdef DT_GPIO_LEDS_LED_1_GPIOS_CONTROLLER
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const uint32_t port0_pin14_config = (/* Pin is configured as PIO0_14 */
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IOPCTL_PIO_FUNC0 |
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/* Disable pull-up / pull-down function */
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IOPCTL_PIO_PUPD_DI |
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/* Enable pull-down function */
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IOPCTL_PIO_PULLDOWN_EN |
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/* Disable input buffer function */
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IOPCTL_PIO_INBUF_DI |
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/* Normal mode */
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IOPCTL_PIO_SLEW_RATE_NORMAL |
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/* Normal drive */
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IOPCTL_PIO_FULLDRIVE_DI |
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/* Analog mux is disabled */
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IOPCTL_PIO_ANAMUX_DI |
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/* Pseudo Output Drain is disabled */
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IOPCTL_PIO_PSEDRAIN_DI |
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/* Input function is not inverted */
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IOPCTL_PIO_INV_DI);
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/* PORT0 PIN14 (coords: A3) is configured as PIO0_14 */
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IOPCTL_PinMuxSet(IOPCTL, 0U, 14U, port0_pin14_config);
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#endif
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#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(flexcomm2), nxp_lpc_i2c, okay) && CONFIG_I2C
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const uint32_t port0_pin17_config = (/* Pin is configured as FC2_CTS_SDA_SSEL0 */
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IOPCTL_PIO_FUNC1 |
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/* Enable pull-up / pull-down function */
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IOPCTL_PIO_PUPD_EN |
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/* Enable pull-up function */
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IOPCTL_PIO_PULLUP_EN |
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/* Enables input buffer function */
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IOPCTL_PIO_INBUF_EN |
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/* Normal mode */
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IOPCTL_PIO_SLEW_RATE_NORMAL |
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/* Full drive enable */
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IOPCTL_PIO_FULLDRIVE_EN |
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/* Analog mux is disabled */
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IOPCTL_PIO_ANAMUX_DI |
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/* Pseudo Output Drain is enabled */
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IOPCTL_PIO_PSEDRAIN_EN |
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/* Input function is not inverted */
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IOPCTL_PIO_INV_DI);
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/* PORT0 PIN17 (coords: D7) is configured as FC2_CTS_SDA_SSEL0 */
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IOPCTL_PinMuxSet(IOPCTL, 0U, 17U, port0_pin17_config);
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const uint32_t port0_pin18_config = (/* Pin is configured as FC2_RTS_SCL_SSEL1 */
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IOPCTL_PIO_FUNC1 |
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/* Enable pull-up / pull-down function */
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IOPCTL_PIO_PUPD_EN |
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/* Enable pull-up function */
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IOPCTL_PIO_PULLUP_EN |
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/* Enables input buffer function */
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IOPCTL_PIO_INBUF_EN |
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/* Normal mode */
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IOPCTL_PIO_SLEW_RATE_NORMAL |
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/* Full drive enable */
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IOPCTL_PIO_FULLDRIVE_EN |
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/* Analog mux is disabled */
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IOPCTL_PIO_ANAMUX_DI |
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/* Pseudo Output Drain is enabled */
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IOPCTL_PIO_PSEDRAIN_EN |
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/* Input function is not inverted */
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IOPCTL_PIO_INV_DI);
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/* PORT0 PIN18 (coords: B7) is configured as FC2_RTS_SCL_SSEL1 */
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IOPCTL_PinMuxSet(IOPCTL, 0U, 18U, port0_pin18_config);
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#endif
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#ifdef CONFIG_FXOS8700_TRIGGER
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const uint32_t port1_pin5_config = (/* Pin is configured as PIO1_5 */
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IOPCTL_PIO_FUNC0 |
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/* Disable pull-up / pull-down function */
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IOPCTL_PIO_PUPD_DI |
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/* Enable pull-down function */
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IOPCTL_PIO_PULLDOWN_EN |
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/* Enables input buffer function */
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IOPCTL_PIO_INBUF_EN |
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/* Normal mode */
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IOPCTL_PIO_SLEW_RATE_NORMAL |
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/* Normal drive */
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IOPCTL_PIO_FULLDRIVE_DI |
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/* Analog mux is disabled */
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IOPCTL_PIO_ANAMUX_DI |
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/* Pseudo Output Drain is disabled */
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IOPCTL_PIO_PSEDRAIN_DI |
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/* Input function is not inverted */
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IOPCTL_PIO_INV_DI);
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/* PORT1 PIN5 (coords: J16) is configured as PIO1_5 */
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IOPCTL_PinMuxSet(IOPCTL, 1U, 5U, port1_pin5_config);
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(flexcomm5), okay) && CONFIG_SPI
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const uint32_t port1_pin3_config = (/* Pin is configured as FC5_SCK */
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IOPCTL_PIO_FUNC1 |
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/* Disable pull-up / pull-down function */
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IOPCTL_PIO_PUPD_DI |
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/* Enable pull-down function */
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IOPCTL_PIO_PULLDOWN_EN |
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/* Enables input buffer function */
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IOPCTL_PIO_INBUF_EN |
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/* Normal mode */
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IOPCTL_PIO_SLEW_RATE_NORMAL |
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/* Normal drive */
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IOPCTL_PIO_FULLDRIVE_DI |
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/* Analog mux is disabled */
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IOPCTL_PIO_ANAMUX_DI |
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/* Pseudo Output Drain is disabled */
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IOPCTL_PIO_PSEDRAIN_DI |
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/* Input function is not inverted */
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IOPCTL_PIO_INV_DI);
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/* PORT1 PIN3 (coords: G16) is configured as FC5_SCK */
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IOPCTL_PinMuxSet(IOPCTL, 1U, 3U, port1_pin3_config);
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const uint32_t port1_pin4_config = (/* Pin is configured as FC5_MISO */
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IOPCTL_PIO_FUNC1 |
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/* Disable pull-up / pull-down function */
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IOPCTL_PIO_PUPD_DI |
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/* Enable pull-down function */
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IOPCTL_PIO_PULLDOWN_EN |
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/* Enables input buffer function */
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IOPCTL_PIO_INBUF_EN |
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/* Normal mode */
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IOPCTL_PIO_SLEW_RATE_NORMAL |
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/* Normal drive */
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IOPCTL_PIO_FULLDRIVE_DI |
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/* Analog mux is disabled */
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IOPCTL_PIO_ANAMUX_DI |
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/* Pseudo Output Drain is disabled */
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IOPCTL_PIO_PSEDRAIN_DI |
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/* Input function is not inverted */
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IOPCTL_PIO_INV_DI);
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/* PORT1 PIN4 (coords: G17) is configured as FC5_TXD_SCL_MISO_WS */
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IOPCTL_PinMuxSet(IOPCTL, 1U, 4U, port1_pin4_config);
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const uint32_t port1_pin5_config = (/* Pin is configured as FC5_MOSI */
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IOPCTL_PIO_FUNC1 |
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/* Disable pull-up / pull-down function */
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IOPCTL_PIO_PUPD_DI |
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/* Enable pull-down function */
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IOPCTL_PIO_PULLDOWN_EN |
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/* Enables input buffer function */
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IOPCTL_PIO_INBUF_EN |
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/* Normal mode */
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IOPCTL_PIO_SLEW_RATE_NORMAL |
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/* Normal drive */
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IOPCTL_PIO_FULLDRIVE_DI |
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/* Analog mux is disabled */
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IOPCTL_PIO_ANAMUX_DI |
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/* Pseudo Output Drain is disabled */
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IOPCTL_PIO_PSEDRAIN_DI |
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/* Input function is not inverted */
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IOPCTL_PIO_INV_DI);
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/* PORT1 PIN5 (coords: J16) is configured as FC5_RXD_SDA_MOSI_DATA */
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IOPCTL_PinMuxSet(IOPCTL, 1U, 5U, port1_pin5_config);
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const uint32_t port1_pin6_config = (/* Pin is configured as FC5_SSEL0 */
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IOPCTL_PIO_FUNC1 |
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/* Disable pull-up / pull-down function */
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IOPCTL_PIO_PUPD_DI |
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/* Enable pull-down function */
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IOPCTL_PIO_PULLDOWN_EN |
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/* Enables input buffer function */
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IOPCTL_PIO_INBUF_EN |
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/* Normal mode */
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IOPCTL_PIO_SLEW_RATE_NORMAL |
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/* Normal drive */
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IOPCTL_PIO_FULLDRIVE_DI |
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/* Analog mux is disabled */
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IOPCTL_PIO_ANAMUX_DI |
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/* Pseudo Output Drain is disabled */
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IOPCTL_PIO_PSEDRAIN_DI |
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/* Input function is not inverted */
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IOPCTL_PIO_INV_DI);
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/* PORT1 PIN6 (coords: J17) is configured as FC5_CTS_SDA_SSEL0 */
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IOPCTL_PinMuxSet(IOPCTL, 1U, 6U, port1_pin6_config);
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#endif
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return 0;
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}
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SYS_INIT(mimxrt685_evk_pinmux_init, PRE_KERNEL_1, CONFIG_PINMUX_INIT_PRIORITY);
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