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969ca3b60b
This adds a simple binding for the Cadence Tensilica Xtensa LX4 CPU. File originally from the LX6 binding. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
9 lines
194 B
YAML
9 lines
194 B
YAML
# Copyright (c) 2018 Nordic Semiconductor ASA
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# SPDX-License-Identifier: Apache-2.0
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description: Cadence Tensilica Xtensa LX4 CPU
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compatible: "cadence,tensilica-xtensa-lx4"
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include: cpu.yaml
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