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https://github.com/zephyrproject-rtos/zephyr
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bc00f19724
The SAM4L have a unique I2C driver. It shares simultaneously pins for both master and slave controllers. Each controller have their own instance. This introduces the TWIM controller that handles only the master part. The TWIM controller uses no copy and the driver was prepared to work with both 7 and 10 bits address. The controller can handler up to 256 bytes for a single transfer allowing long data communication with almost no CPU intervention. The driver was wrote specifically to Zephyr. It receives a transfer list of from upper layers to a specific device on the bus. It programs the first and second transfer, if it exists, before start. At end of full read/write interrupt, will program the next data block. This process repeats until all transfers be executed. The driver uses interrupt from TWIM to check for erros or program next tranfer. Future work can enable low power mode on the driver allowing long transfers with low power consumption. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com> |
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| .. | ||
| arm | ||
| atmel_sam | ||
| atmel_sam0 | ||
| bcm_vk | ||
| common/cortex_m | ||
| cypress | ||
| infineon_xmc | ||
| microchip_mec | ||
| nordic_nrf | ||
| nuvoton | ||
| nuvoton_npcx | ||
| nxp_imx | ||
| nxp_kinetis | ||
| nxp_lpc | ||
| qemu_cortex_a53 | ||
| quicklogic_eos_s3 | ||
| silabs_exx32 | ||
| st_stm32 | ||
| ti_lm3s6965 | ||
| ti_simplelink | ||
| xilinx_zynqmp | ||
| CMakeLists.txt | ||
| Kconfig | ||