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https://github.com/zephyrproject-rtos/zephyr
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cb8ee73692
Add pinctl support for the SAM SPI device. We update the SPI binding to have pinctrl-0 bindings that are expected to have at least phandles for MISO, MOSI, and SPCK, but might also have various chip selects as well. The pinctrl nodes will have an 'atmel,pins' property that describes the GPIO port, pin and periphal configuration for that pin. We update sam*-pinctrl.dtsi files with all the various pin ctrl configuration operations supported by the given SoC family. These files are based on data extracted from the Atmel ASF HAL (in include/sam<FAMILY>/pio/*.h). Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
52 lines
1.6 KiB
Plaintext
52 lines
1.6 KiB
Plaintext
/*
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* Copyright (c) 2020 Linaro Limited
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "pinctrl_atmel_sam.h"
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/ {
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soc {
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pinctrl@400e0e00 {
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/* instance, signal, pio, pin, peripheral */
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DT_ATMEL_PIN(spi, miso, a, 12, a);
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DT_ATMEL_PIN(spi, mosi, a, 13, a);
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DT_ATMEL_PIN(spi, npcs0, a, 11, a);
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DT_ATMEL_PIN(spi, npcs1, a, 9, b);
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DT_ATMEL_PIN(spi, npcs1, a, 31, a);
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DT_ATMEL_PIN(spi, npcs1, b, 14, a);
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DT_ATMEL_PIN(spi, npcs1, c, 4, b);
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DT_ATMEL_PIN(spi, npcs2, a, 10, b);
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DT_ATMEL_PIN(spi, npcs2, a, 30, b);
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DT_ATMEL_PIN(spi, npcs2, b, 2, b);
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DT_ATMEL_PIN(spi, npcs3, a, 3, b);
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DT_ATMEL_PIN(spi, npcs3, a, 5, b);
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DT_ATMEL_PIN(spi, npcs3, a, 22, b);
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DT_ATMEL_PIN(spi, spck, a, 14, a);
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DT_ATMEL_PIN(twi0, twck0, a, 4, a);
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DT_ATMEL_PIN(twi0, twd0, a, 3, a);
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DT_ATMEL_PIN(twi1, twck1, b, 5, a);
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DT_ATMEL_PIN(twi1, twd1, b, 4, a);
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DT_ATMEL_PIN(uart0, urxd0, a, 9, a);
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DT_ATMEL_PIN(uart0, utxd0, a, 10, a);
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DT_ATMEL_PIN(uart1, urxd1, b, 2, a);
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DT_ATMEL_PIN(uart1, utxd1, b, 3, a);
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DT_ATMEL_PIN(usart0, cts0, a, 8, a);
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DT_ATMEL_PIN(usart0, rts0, a, 7, a);
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DT_ATMEL_PIN(usart0, rxd0, a, 5, a);
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DT_ATMEL_PIN(usart0, sck0, a, 2, b);
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DT_ATMEL_PIN(usart0, txd0, a, 6, a);
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DT_ATMEL_PIN(usart1, cts1, a, 25, a);
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DT_ATMEL_PIN(usart1, dcd1, a, 26, a);
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DT_ATMEL_PIN(usart1, dsr1, a, 28, a);
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DT_ATMEL_PIN(usart1, dtr1, a, 27, a);
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DT_ATMEL_PIN(usart1, ri1, a, 29, a);
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DT_ATMEL_PIN(usart1, rts1, a, 24, a);
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DT_ATMEL_PIN(usart1, rxd1, a, 21, a);
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DT_ATMEL_PIN(usart1, sck1, a, 23, a);
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DT_ATMEL_PIN(usart1, txd1, a, 22, a);
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};
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};
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};
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