mirror of
https://github.com/zephyrproject-rtos/zephyr
synced 2025-09-02 23:32:29 +00:00
89f92ab0f8
The arc_iot.dtsi used "intel,qmsi-ss-gpio" and "intel,qmsi-ss-i2c" compatiables, however we have no drivers for these and it seems wrong that the ARC platform would utilize such compatiables. Remove the compatiable fields for now (proper one's can be added when there are I2C and GPIO drivers for this platform). Also remove the binding files associated with "intel,qmsi-ss-gpio" and "intel,qmsi-ss-i2c" as nothing in tree utilizes them. Fixes: 19227 Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
255 lines
5.0 KiB
Plaintext
255 lines
5.0 KiB
Plaintext
/*
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* Copyright (c) 2018, Synopsys, Inc. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "skeleton.dtsi"
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#include <dt-bindings/i2c/i2c.h>
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#include <dt-bindings/gpio/gpio.h>
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/ {
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu0: cpu@0 {
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device_type = "cpu";
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compatible = "snps,arcem";
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reg = <0>;
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};
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intc: arcv2-intc {
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compatible = "snps,arcv2-intc";
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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};
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iccm0: iccm@20000000 {
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compatible = "arc,iccm";
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reg = <0x20000000 0x40000>;
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};
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dccm0: dccm@80000000 {
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compatible = "arc,dccm";
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reg = <0x80000000 0x20000>;
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};
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sram: memory@30000000 {
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compatible = "mmio-sram";
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reg = <0x30000000 0x20000>;
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};
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flash0: flash@0 {
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compatible = "soc-nv-flash";
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reg = <0x0 0x40000>;
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};
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sysclk: system-clock {
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compatible = "fixed-clock";
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clock-frequency = <144000000>;
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#clock-cells = <0>;
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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ranges;
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uart0: uart@80014000 {
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compatible = "ns16550";
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clock-frequency = <16000000>;
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reg = <0x80014000 0x100>;
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label = "UART_0";
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interrupts = <86 0>;
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interrupt-parent = <&intc>;
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dlf = <0x01>;
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};
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uart1: uart@80014100 {
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compatible = "ns16550";
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clock-frequency = <16000000>;
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reg = <0x80014100 0x100>;
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label = "UART_1";
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interrupts = <87 0>;
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interrupt-parent = <&intc>;
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};
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uart2: uart@80014200 {
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compatible = "ns16550";
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clock-frequency = <16000000>;
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reg = <0x80014200 0x1000>;
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label = "UART_2";
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interrupts = <88 0>;
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interrupt-parent = <&intc>;
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};
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uart3: uart@80014300 {
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compatible = "ns16550";
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clock-frequency = <144000000>;
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reg = <0x80014300 0x100>;
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label = "UART_3";
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interrupts = <89 0>;
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interrupt-parent = <&intc>;
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};
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gpio8b0: gpio@80017800 {
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reg = <0x80017800 0x100>;
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interrupts = <54 1>;
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interrupt-parent = <&intc>;
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label = "GPIO_8B_0";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpio8b1: gpio@80017900 {
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reg = <0x80017900 0x100>;
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interrupts = <55 1>;
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interrupt-parent = <&intc>;
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label = "GPIO_8B_1";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpio8b2: gpio@80017a00 {
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reg = <0x80017a00 0x100>;
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interrupts = <56 1>;
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interrupt-parent = <&intc>;
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label = "GPIO_8B_2";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpio8b3: gpio@80017b00 {
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reg = <0x80017b00 0x100>;
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interrupts = <57 1>;
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interrupt-parent = <&intc>;
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label = "GPIO_8B_3";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpio4b0: gpio@80017c00 {
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reg = <0x80017c00 0x100>;
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interrupts = <19 1>;
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interrupt-parent = <&intc>;
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label = "GPIO_4B_0";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpio4b1: gpio@80017d00 {
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reg = <0x80017d00 0x100>;
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interrupts = <52 1>;
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interrupt-parent = <&intc>;
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label = "GPIO_4B_1";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpio4b2: gpio@80017e00 {
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reg = <0x80017e00 0x100>;
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interrupts = <53 1>;
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interrupt-parent = <&intc>;
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label = "GPIO_4B_2";
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gpio-controller;
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#gpio-cells = <2>;
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};
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i2c0: i2c@80012000 {
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x80012000 0x100>;
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interrupts = <58 1>, <61 1>, <60 1>, <59 1>;
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interrupt-names = "error", "stop", "tx", "rx";
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interrupt-parent = <&intc>;
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label = "I2C_0";
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status = "disabled";
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};
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i2c1: i2c@80012100 {
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x80012100 0x100>;
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interrupts = <62 1>, <65 1>, <64 1>, <63 1>;
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interrupt-names = "error", "stop", "tx", "rx";
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interrupt-parent = <&intc>;
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label = "I2C_1";
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status = "disabled";
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};
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i2c2: i2c@80012200 {
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x80012200 0x100>;
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interrupts = <66 1>, <69 1>, <68 1>, <67 1>;
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interrupt-names = "error", "stop", "tx", "rx";
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interrupt-parent = <&intc>;
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label = "I2C_2";
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status = "disabled";
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};
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spi0: spi@80010000 {
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compatible = "snps,designware-spi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x80010000 0x100>;
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clocks = <&sysclk>;
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interrupts = <70 2>, <71 2>, <72 2>;
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interrupt-names = "err-int", "rx-avail", "tx-req";
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interrupt-parent = <&intc>;
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label = "SPI_0";
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status = "disabled";
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};
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spi1: spi@80010100 {
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compatible = "snps,designware-spi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x80010100 0x100>;
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clocks = <&sysclk>;
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interrupts = <74 2>, <75 2>, <76 2>;
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interrupt-names = "err-int", "rx-avail", "tx-req";
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interrupt-parent = <&intc>;
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label = "SPI_1";
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status = "disabled";
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};
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spi2: spi@80010200 {
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compatible = "snps,designware-spi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x80010200 0x100>;
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clocks = <&sysclk>;
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interrupts = <78 2>, <79 2>, <80 2>;
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interrupt-names = "err-int", "rx-avail", "tx-req";
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interrupt-parent = <&intc>;
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label = "SPI_2";
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status = "disabled";
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};
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};
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};
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