zephyr/soc/riscv/openisa_rv32m1
Henrik Brix Andersen b702e5fdde soc: riscv: rv32m1: enable the RV32M1 Timer/PWM driver
Enable the driver for the Timer/PWM (TPM) module present in the
OpenISA RV32M1 when PWM is enabled.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-01-13 09:12:34 -06:00
..
CMakeLists.txt riscv: linker.ld: Port vector table to zephyr_linker_sources() 2019-12-20 08:54:53 -05:00
dts_fixup.h
Kconfig
Kconfig.defconfig soc: riscv: rv32m1: enable the RV32M1 Timer/PWM driver 2020-01-13 09:12:34 -06:00
Kconfig.soc modules: vega: add option for indicating the presence of RV32M1 TPM 2020-01-13 09:12:34 -06:00
linker.ld devicetree: Remove DT_SRAM_{BASE_ADDRESS,SIZE}, use CONFIG_* versions 2020-01-07 17:19:36 +01:00
soc_context.h
soc_irq.S
soc_offsets.h
soc_ri5cy.h riscv: use standard MSTATUS 2020-01-06 13:27:45 -05:00
soc_zero_riscy.h riscv: use standard MSTATUS 2020-01-06 13:27:45 -05:00
soc.c soc: riscv: rv32m1: enable peripheral clocks for Timer/PWM modules 2020-01-13 09:12:34 -06:00
soc.h devicetree: Remove DT_SRAM_{BASE_ADDRESS,SIZE}, use CONFIG_* versions 2020-01-07 17:19:36 +01:00
vector_table.ld riscv: linker.ld: Port vector table to zephyr_linker_sources() 2019-12-20 08:54:53 -05:00
vector.S
wdog.S riscv: use standard MSTATUS 2020-01-06 13:27:45 -05:00