Marti Bolivar f3b18bc2e9 drivers: spi: stm32: fix transmit/receive procedure ... The transmit and receive procedure used in the STM32 SPI driver is not correct. On STM32F4, this is causing OVR errors (per the logged error mask) and transmission of undesired 0x00 bytes (verified with a logic analyzer). The root cause is that the receive register is not read (via DR, when RXNE is set) each time the transmit register is written (also via DR, when TXE is set). This clearly causes OVR errors when there is no FIFO, as the receive register needs to be read each time a frame is transceived, or the IP block has no way of knowing that the overwritten data were not important. Adapt the I/O procedure so that every DR write is matched by a DR read, blocking until the relevant flags are set if necessary. This behavior is suboptimal for targets such as STM32L4, where there is a SPI FIFO. However, SPI I/O is broken on those targets, and this patch fixes them as well. Further optimizations for targets with FIFOs is left to future work. Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>		2017-08-08 07:45:35 -04:00
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Kconfig
Kconfig.dw
Kconfig.mcux_dspi
Kconfig.nrf5_legacy
Makefile
spi_context.h
spi_dw_legacy.c
spi_dw_quark_se_ss_regs.h
spi_dw_regs.h
spi_dw.c
spi_dw.h
spi_intel.c
spi_intel.h
spi_ll_stm32.c	drivers: spi: stm32: fix transmit/receive procedure	2017-08-08 07:45:35 -04:00
spi_ll_stm32.h
spi_mcux_dspi.c
spi_qmsi_ss.c
spi_qmsi.c
spim_nrf52_legacy.c
spis_nrf5_legacy.c