Filip Brozovic 9e92babca2 stm32: clock_control: fix APB2 peripheral clock control on stm32g0 ... The STM32G0 series of MCUs only has one APB, but two reset and clock enable registers. Fix enabling/disabling the clock and getting the rate for peripherals in the second register. Signed-off-by: Filip Brozovic <fbrozovic@gmail.com>		2019-12-18 22:06:39 +01:00
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beetle_clock_control.c
clock_control_mcux_ccm.c
clock_control_mcux_mcg.c
clock_control_mcux_pcc.c
clock_control_mcux_scg.c
clock_control_mcux_sim.c
clock_control_rv32m1_pcc.c
clock_stm32_ll_common.c	stm32: clock_control: fix APB2 peripheral clock control on stm32g0	2019-12-18 22:06:39 +01:00
clock_stm32_ll_common.h
clock_stm32_ll_h7.c
clock_stm32_ll_mp1.c
clock_stm32f1.c
clock_stm32f2_f4_f7.c
clock_stm32f0_f3.c
clock_stm32g4.c
clock_stm32g0.c
clock_stm32l4_wb.c
clock_stm32l0_l1.c
CMakeLists.txt
Kconfig
Kconfig.beetle
Kconfig.mcux_ccm
Kconfig.mcux_mcg
Kconfig.mcux_pcc
Kconfig.mcux_scg
Kconfig.mcux_sim
Kconfig.nrf
Kconfig.rv32m1
Kconfig.stm32
Kconfig.stm32f1
Kconfig.stm32f2_f4_f7
Kconfig.stm32f0_f3
Kconfig.stm32g0
Kconfig.stm32g4
Kconfig.stm32h7
Kconfig.stm32l4_wb
Kconfig.stm32l0_l1
nrf_clock_calibration.c
nrf_clock_calibration.h
nrf_power_clock.c