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Add clock controller support for Nuvoton NPCX series. This CL includes: 1. Add clock controller device tree declarations. 2. Introduce clock-cells in yaml file clock tree to get module's source clock and turn off/on the its clock 3. Clock controller driver implementation. Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
44 lines
1010 B
Plaintext
44 lines
1010 B
Plaintext
# NPCX Clock controller driver configuration options
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# Copyright (c) 2020 Nuvoton Technology Corporation.
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# SPDX-License-Identifier: Apache-2.0
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config CLOCK_CONTROL_NPCX
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bool "NPCX clock controller driver"
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depends on SOC_FAMILY_NPCX
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help
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Enable support for NPCX clock controller driver.
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config CLOCK_NPCX_OSC_CYCLES_PER_SEC
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int "CDCG PLL frequency"
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default 48000000
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range 10000000 100000000
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depends on SOC_FAMILY_NPCX
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help
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Core Domain Clock Generator PLL frequency,
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allowed values: From 10Mhz to 100Mhz.
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config CLOCK_NPCX_APB1_PRESCALER
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int "APB1 prescaler"
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default 4
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range 1 10
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depends on SOC_FAMILY_NPCX
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help
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APB1 prescaler, allowed values: From 1 to 10.
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config CLOCK_NPCX_APB2_PRESCALER
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int "APB1 prescaler"
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default 8
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range 1 10
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depends on SOC_FAMILY_NPCX
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help
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APB2 prescaler, allowed values: From 1 to 10.
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config CLOCK_NPCX_APB3_PRESCALER
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int "APB3 prescaler"
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default 2
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range 1 10
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depends on SOC_FAMILY_NPCX
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help
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APB3 prescaler, allowed values: From 1 to 10.
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