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f9e0fa9af3
zephyr/soc
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Mohamed ElShahawi f9e0fa9af3 drivers: esp32/clock_control: support UART, I2C 
- Change default CPU Clock to 240MHz
(PLL is activated)
- I2C, UART will use sysclk from clock driver
- esp32_enable_peripheral replaced by
clock_control_on

Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
2020-06-16 09:00:51 -05:00
..
arc boards: arc: emsdp: fix secure config for emsdp_em7d_esp 2020-06-09 11:30:37 +02:00
arm soc: nxp_imx: Fix flash size in imxrt boot header 2020-06-15 16:59:28 +02:00
nios2
posix
riscv linker: Remove deprecated Kconfig options related to linker scripts 2020-06-12 11:14:28 +02:00
x86
xtensa drivers: esp32/clock_control: support UART, I2C 2020-06-16 09:00:51 -05:00
Kconfig linker: Remove deprecated Kconfig options related to linker scripts 2020-06-12 11:14:28 +02:00